component
TN815-800B-TR
Public Made by Adomby adom
ST(意法半导体) Thyristors (SCR)/Modules, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TN815-800B-TR
ST(意法半导体) · Thyristors (SCR)/Modules · DPAK
TN815-800B-TR from ST(意法半导体), in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode of the SCR; current returns here when the device is on, with VDRM/VRRM of 800 V for TN815-800B. |
| 2 | A | passive | Anode of the SCR, also connected to the metal tab; carries up to 8 A rms on-state current (IT(RMS), TC = 110 °C). |
| 3 | G | input | Gate trigger input; IGT is 2 mA min to 15 mA max at VD = 12 V, RL = 140 Ω, and maximum peak reverse gate voltage VRGM is 5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ST(意法半导体) |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| RMS on-state current (180° conduction angle) | IT(RMS) | 8 | A | TC = 110 °C | 2 | ||
| Average on-state current (180° conduction angle) | IT(AV) | 5 | A | TC = 110 °C | 2 | ||
| Non repetitive surge peak on-state current (TN815 column) | ITSM | 100 | A | tp = 8.3 ms, Tj = 25 °C | 2 | ||
| Non repetitive surge peak on-state current (TN815 column) | ITSM | 95 | A | tp = 10 ms | 2 | ||
| I2t value for fusing (TN815 column) | I2t | 45 | A2s | tp = 10 ms, Tj = 25 °C | 2 | ||
| Critical rate of rise of on-state current | dI/dt | 50 | A/µs | IG = 2 x IGT, tr ≤ 100 ns, F = 60 Hz, Tj = 125 °C | 2 | ||
| Peak gate current | IGM | 4 | A | tp = 20 µs, Tj = 125 °C | 2 | ||
| Average gate power dissipation | PG(AV) | 1 | W | Tj = 125 °C | 2 | ||
| Storage junction temperature range | Tstg | -40 | 150 | °C | 2 | ||
| Operating junction temperature range | Tj | -40 | 125 | °C | 2 | ||
| Maximum peak reverse gate voltage (for TN8x5 and TYN608 only) | VRGM | 5 | V | 2 | |||
| Gate trigger current (standard, TN815 column) | IGT | 2 | 15 | mA | VD = 12 V, RL = 140 Ω | 3 | |
| Gate trigger voltage | VGT | 1.3 | V | 3 | |||
| Gate non-trigger voltage | VGD | 0.2 | V | VD = VDRM, RL = 3.3 kΩ, Tj = 125 °C | 3 | ||
| Holding current (TN815 column) | IH | 40 | mA | IT = 100 mA, gate open | 3 | ||
| Latching current (TN815 column) | IL | 50 | mA | IG = 1.2 IGT | 3 | ||
| Critical rate of rise of off-state voltage (TN815 column) | dV/dt | 150 | V/µs | VD = 67% VDRM, gate open, Tj = 125 °C | 3 | ||
| On-state voltage | VTM | 1.6 | V | ITM = 16 A, tp = 380 μs, Tj = 25 °C | 3 | ||
| Threshold voltage | Vt0 | 0.85 | V | Tj = 125 °C | 3 | ||
| Dynamic resistance | Rd | 46 | mΩ | Tj = 125 °C | 3 | ||
| Repetitive peak off-state current (leakage at Tj = 25 °C) | IDRM/IRRM | 5 | µA | VDRM = VRRM, Tj = 25 °C | 3 | ||
| Repetitive peak off-state current (leakage at Tj = 125 °C) | IDRM/IRRM | 2 | mA | VDRM = VRRM, Tj = 125 °C | 3 | ||
| Junction to case (DC), IPAK / DPAK / TO-220AB | Rth(j-c) | 1.3 | °C/W | DC | 3 | ||
| Junction to ambient, DPAK | Rth(j-a) | 70 | °C/W | S = 0.5 cm² copper surface under tab | 3 |
CAD (KiCad official)
- Symbol:
TN815-800B-TR - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files:
tn815-800b-tr-etched.step/tn815-800b-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tn815-800b-tr.step/tn815-800b-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ST(意法半导体) datasheet (20 pp, sha256
677c856e0293d8af, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TN815-800B-TR
**ST(意法半导体)** · Thyristors (SCR)/Modules · DPAK
TN815-800B-TR from ST(意法半导体), in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode of the SCR; current returns here when the device is on, with VDRM/VRRM of 800 V for TN815-800B. |
| 2 | A | passive | Anode of the SCR, also connected to the metal tab; carries up to 8 A rms on-state current (IT(RMS), TC = 110 °C). |
| 3 | G | input | Gate trigger input; IGT is 2 mA min to 15 mA max at VD = 12 V, RL = 140 Ω, and maximum peak reverse gate voltage VRGM is 5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ST(意法半导体) |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| RMS on-state current (180° conduction angle) | IT(RMS) | | | 8 | A | TC = 110 °C | 2 |
| Average on-state current (180° conduction angle) | IT(AV) | | | 5 | A | TC = 110 °C | 2 |
| Non repetitive surge peak on-state current (TN815 column) | ITSM | | | 100 | A | tp = 8.3 ms, Tj = 25 °C | 2 |
| Non repetitive surge peak on-state current (TN815 column) | ITSM | | | 95 | A | tp = 10 ms | 2 |
| I2t value for fusing (TN815 column) | I2t | | | 45 | A2s | tp = 10 ms, Tj = 25 °C | 2 |
| Critical rate of rise of on-state current | dI/dt | | | 50 | A/µs | IG = 2 x IGT, tr ≤ 100 ns, F = 60 Hz, Tj = 125 °C | 2 |
| Peak gate current | IGM | | | 4 | A | tp = 20 µs, Tj = 125 °C | 2 |
| Average gate power dissipation | PG(AV) | | | 1 | W | Tj = 125 °C | 2 |
| Storage junction temperature range | Tstg | -40 | | 150 | °C | | 2 |
| Operating junction temperature range | Tj | -40 | | 125 | °C | | 2 |
| Maximum peak reverse gate voltage (for TN8x5 and TYN608 only) | VRGM | | | 5 | V | | 2 |
| Gate trigger current (standard, TN815 column) | IGT | 2 | | 15 | mA | VD = 12 V, RL = 140 Ω | 3 |
| Gate trigger voltage | VGT | | | 1.3 | V | | 3 |
| Gate non-trigger voltage | VGD | 0.2 | | | V | VD = VDRM, RL = 3.3 kΩ, Tj = 125 °C | 3 |
| Holding current (TN815 column) | IH | | | 40 | mA | IT = 100 mA, gate open | 3 |
| Latching current (TN815 column) | IL | | | 50 | mA | IG = 1.2 IGT | 3 |
| Critical rate of rise of off-state voltage (TN815 column) | dV/dt | 150 | | | V/µs | VD = 67% VDRM, gate open, Tj = 125 °C | 3 |
| On-state voltage | VTM | | | 1.6 | V | ITM = 16 A, tp = 380 μs, Tj = 25 °C | 3 |
| Threshold voltage | Vt0 | | | 0.85 | V | Tj = 125 °C | 3 |
| Dynamic resistance | Rd | | | 46 | mΩ | Tj = 125 °C | 3 |
| Repetitive peak off-state current (leakage at Tj = 25 °C) | IDRM/IRRM | | | 5 | µA | VDRM = VRRM, Tj = 25 °C | 3 |
| Repetitive peak off-state current (leakage at Tj = 125 °C) | IDRM/IRRM | | | 2 | mA | VDRM = VRRM, Tj = 125 °C | 3 |
| Junction to case (DC), IPAK / DPAK / TO-220AB | Rth(j-c) | | | 1.3 | °C/W | DC | 3 |
| Junction to ambient, DPAK | Rth(j-a) | | | 70 | °C/W | S = 0.5 cm² copper surface under tab | 3 |
## CAD (KiCad official)
- Symbol: `TN815-800B-TR`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files: `tn815-800b-tr-etched.step` / `tn815-800b-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tn815-800b-tr.step` / `tn815-800b-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ST(意法半导体) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903813538586624) (20 pp, sha256 `677c856e0293d8af`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tn815-800b-tr-datasheet.pdf)