TMS320F28062FPZT

{
  "schema_version": 1,
  "type": "component",
  "slug": "tms320f28062fpzt",
  "title": "TMS320F28062FPZT",
  "brief": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "embedded processors & controllers",
    "tms320f28062fpzt",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "TMS320F28062FPZT",
    "manufacturer": "Texas Instruments",
    "package": "LQFP-100(14x14)",
    "pin_count": 100,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tms320f28062f",
    "parts": {
      "symbol": "tms320f28062fpzt.kicad_sym",
      "footprint": "tms320f28062fpzt.kicad_mod",
      "model_3d": "tms320f28062fpzt-hero.glb",
      "model_3d_plain": "tms320f28062fpzt.glb",
      "model_3d_step": "tms320f28062fpzt-etched.step",
      "model_3d_step_plain": "tms320f28062fpzt.step",
      "lbr": "tms320f28062fpzt.lbr"
    },
    "distributor_links": {
      "lcsc": "C544387",
      "digikey": "296-TMS320F28062FPZT-ND",
      "mouser": "595-TMS320F28062FPZT"
    },
    "distributor_check": {
      "checked_at": "2026-10-07T21:45:27Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-TMS320F28062FPZT-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-TMS320F28062FPZT",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "GPIO42",
        "type": "bidirectional",
        "description": "General-purpose I/O 42 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternates are EPWM8A output with HRPWM, TZ1 trip-zone input and COMP1OUT comparator 1 direct output."
      },
      {
        "number": "2",
        "name": "GPIO23/EQEP1I/MFSXA/SCIRXDB",
        "type": "bidirectional",
        "description": "General-purpose I/O 23 (I/O/Z, internal pullup); alternates are eQEP1 index, McBSP-A transmit frame sync and SCI-B receive data."
      },
      {
        "number": "3",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital power pin; when using the internal VREG, place one 1.2-µF capacitor between each VDD pin and ground."
      },
      {
        "number": "4",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "5",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer power pin; single supply source when VREG is enabled, with a decoupling capacitor on each pin."
      },
      {
        "number": "6",
        "name": "GPIO20/EQEP1A/MDXA/COMP1OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 20 (I/O/Z, internal pullup); alternates are eQEP1 input A, McBSP transmit serial data and COMP1OUT comparator 1 direct output."
      },
      {
        "number": "7",
        "name": "GPIO21/EQEP1B/MDRA/COMP2OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 21 (I/O/Z, internal pullup); alternates are eQEP1 input B, McBSP receive serial data and COMP2OUT comparator 2 direct output."
      },
      {
        "number": "8",
        "name": "GPIO43",
        "type": "bidirectional",
        "description": "General-purpose I/O 43 (I/O/Z, internal pullup); alternates are EPWM8B output, TZ2 trip-zone input and COMP2OUT comparator 2 direct output."
      },
      {
        "number": "9",
        "name": "GPIO4/EPWM3A",
        "type": "bidirectional",
        "description": "General-purpose I/O 4 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternate is EPWM3A output with HRPWM channel."
      },
      {
        "number": "10",
        "name": "GPIO5/EPWM3B/SPISIMOA/ECAP1",
        "type": "bidirectional",
        "description": "General-purpose I/O 5 (I/O/Z, internal pullup); alternates are EPWM3B output, SPI-A slave-in/master-out and eCAP1 input/output."
      },
      {
        "number": "11",
        "name": "XRS",
        "type": "bidirectional",
        "description": "Device reset input and watchdog reset output (open-drain with internal pullup); a 2.2 kΩ to 10 kΩ resistor to VDDIO is recommended and any capacitor to VSS should be 100 nF or smaller."
      },
      {
        "number": "12",
        "name": "TRST",
        "type": "input",
        "description": "JTAG test reset with internal pulldown; must be maintained low during normal device operation and an external pulldown (2.2 kΩ generally adequate) is required."
      },
      {
        "number": "13",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer power pin; single supply source when VREG is enabled, with a decoupling capacitor on each pin."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital power pin; when using the internal VREG, place one 1.2-µF capacitor between each VDD pin and ground."
      },
      {
        "number": "15",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "16",
        "name": "ADCINA7",
        "type": "input",
        "description": "ADC Group A, channel 7 analog input."
      },
      {
        "number": "17",
        "name": "ADCINA6/COMP3A/AIO6",
        "type": "input",
        "description": "ADC Group A, channel 6 analog input; also comparator 3A input and digital AIO6 (AIO pins have no internal pullup)."
      },
      {
        "number": "18",
        "name": "ADCINA5",
        "type": "input",
        "description": "ADC Group A, channel 5 analog input."
      },
      {
        "number": "19",
        "name": "ADCINA4/COMP2A/AIO4",
        "type": "input",
        "description": "ADC Group A, channel 4 analog input; also comparator 2A input and digital AIO4 (AIO pins have no internal pullup)."
      },
      {
        "number": "20",
        "name": "ADCINA3",
        "type": "input",
        "description": "ADC Group A, channel 3 analog input."
      },
      {
        "number": "21",
        "name": "ADCINA2/COMP1A/AIO2",
        "type": "input",
        "description": "ADC Group A, channel 2 analog input; also comparator 1A input and digital AIO2 (AIO pins have no internal pullup)."
      },
      {
        "number": "22",
        "name": "ADCINA1",
        "type": "input",
        "description": "ADC Group A, channel 1 analog input."
      },
      {
        "number": "23",
        "name": "ADCINA0",
        "type": "input",
        "description": "ADC Group A, channel 0 analog input; on the 100-pin package this is a separate pin from VREFHI (pin 24)."
      },
      {
        "number": "24",
        "name": "VREFHI",
        "type": "input",
        "description": "ADC external reference high, used only in ADC external reference mode; VREFHI must not exceed VDDA."
      },
      {
        "number": "25",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog power pin; tie with a 2.2-µF capacitor (typical) close to the pin."
      },
      {
        "number": "26",
        "name": "VSSA",
        "type": "power_in",
        "description": "Analog ground pin."
      },
      {
        "number": "27",
        "name": "VREFLO",
        "type": "input",
        "description": "ADC external reference low; equals VSSA in the internal reference mode."
      },
      {
        "number": "28",
        "name": "ADCINB0",
        "type": "input",
        "description": "ADC Group B, channel 0 analog input."
      },
      {
        "number": "29",
        "name": "ADCINB1",
        "type": "input",
        "description": "ADC Group B, channel 1 analog input."
      },
      {
        "number": "30",
        "name": "ADCINB2/COMP1B/AIO10",
        "type": "input",
        "description": "ADC Group B, channel 2 analog input; also comparator 1B input and digital AIO10 (AIO pins have no internal pullup)."
      },
      {
        "number": "31",
        "name": "ADCINB3",
        "type": "input",
        "description": "ADC Group B, channel 3 analog input."
      },
      {
        "number": "32",
        "name": "ADCINB4/COMP2B/AIO12",
        "type": "input",
        "description": "ADC Group B, channel 4 analog input; also comparator 2B input and digital AIO12 (AIO pins have no internal pullup)."
      },
      {
        "number": "33",
        "name": "ADCINB5",
        "type": "input",
        "description": "ADC Group B, channel 5 analog input."
      },
      {
        "number": "34",
        "name": "ADCINB6/COMP3B/AIO14",
        "type": "input",
        "description": "ADC Group B, channel 6 analog input; also comparator 3B input and digital AIO14 (AIO pins have no internal pullup)."
      },
      {
        "number": "35",
        "name": "ADCINB7",
        "type": "input",
        "description": "ADC Group B, channel 7 analog input."
      },
      {
        "number": "36",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "37",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital power pin; when using the internal VREG, place one 1.2-µF capacitor between each VDD pin and ground."
      },
      {
        "number": "38",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer power pin; single supply source when VREG is enabled, with a decoupling capacitor on each pin."
      },
      {
        "number": "39",
        "name": "GPIO25/ECAP2/EQEP2B/SPISOMIB",
        "type": "bidirectional",
        "description": "General-purpose I/O 25 (I/O/Z, internal pullup); alternates are eCAP2 input/output, eQEP2 input B (PZ/PZP only) and SPI-B slave-out/master-in."
      },
      {
        "number": "40",
        "name": "GPIO31/CANTXA/EQEP2S/EPWM8A",
        "type": "bidirectional",
        "description": "General-purpose I/O 31 (I/O/Z, internal pullup); alternates are CAN transmit, eQEP2 strobe (PZ/PZP only) and EPWM8A output."
      },
      {
        "number": "41",
        "name": "GPIO30/CANRXA/EQEP2I/EPWM7A",
        "type": "bidirectional",
        "description": "General-purpose I/O 30 (I/O/Z, internal pullup); alternates are CAN receive, eQEP2 index (PZ/PZP only) and EPWM7A output."
      },
      {
        "number": "42",
        "name": "GPIO50/EQEP1A/MDXA/TZ1",
        "type": "bidirectional",
        "description": "General-purpose I/O 50 (I/O/Z, internal pullup); alternates are eQEP1 input A, McBSP transmit serial data and TZ1 trip-zone input."
      },
      {
        "number": "43",
        "name": "GPIO29/SCITXDA/SCLA/TZ3",
        "type": "bidirectional",
        "description": "General-purpose I/O 29 (I/O/Z, internal pullup); alternates are SCI-A transmit data, I2C clock (open-drain) and TZ3 trip-zone input."
      },
      {
        "number": "44",
        "name": "GPIO12",
        "type": "bidirectional",
        "description": "General-purpose I/O 12 (I/O/Z, internal pullup); alternates are TZ1 trip-zone input, SCI-A transmit data and SPI-B slave-in/master-out."
      },
      {
        "number": "45",
        "name": "TEST2",
        "type": "bidirectional",
        "description": "Test pin reserved for TI; must be left unconnected."
      },
      {
        "number": "46",
        "name": "VDD3VFL",
        "type": "power_in",
        "description": "3.3-V flash core power pin; this pin should be connected to 3.3 V at all times."
      },
      {
        "number": "47",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "48",
        "name": "GPIO51/EQEP1B/MDRA/TZ2",
        "type": "bidirectional",
        "description": "General-purpose I/O 51 (I/O/Z, internal pullup); alternates are eQEP1 input B, McBSP receive serial data and TZ2 trip-zone input."
      },
      {
        "number": "49",
        "name": "GPIO9/EPWM5B/SCITXDB/ECAP3",
        "type": "bidirectional",
        "description": "General-purpose I/O 9 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternates are EPWM5B output, SCI-B transmit data and eCAP3 input/output."
      },
      {
        "number": "50",
        "name": "GPIO28/SCIRXDA/SDAA/TZ2",
        "type": "bidirectional",
        "description": "General-purpose I/O 28 (I/O/Z, internal pullup); alternates are SCI-A receive data, I2C data (open-drain) and TZ2 trip-zone input."
      },
      {
        "number": "51",
        "name": "GPIO18/SPICLKA/SCITXDB/XCLKOUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 18 (I/O/Z, internal pullup); alternates are SPI-A clock, SCI-B transmit data and XCLKOUT (SYSCLKOUT-derived clock, reset value SYSCLKOUT/4)."
      },
      {
        "number": "52",
        "name": "GPIO17/SPISOMIA/TZ3",
        "type": "bidirectional",
        "description": "General-purpose I/O 17 (I/O/Z, internal pullup); alternates are SPI-A slave-out/master-in and TZ3 trip-zone input."
      },
      {
        "number": "53",
        "name": "GPIO52/EQEP1S/MCLKXA/TZ3",
        "type": "bidirectional",
        "description": "General-purpose I/O 52 (I/O/Z, internal pullup); alternates are eQEP1 strobe, McBSP transmit clock and TZ3 trip-zone input."
      },
      {
        "number": "54",
        "name": "GPIO8/EPWM5A/ADCSOCAO",
        "type": "bidirectional",
        "description": "General-purpose I/O 8 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternates are EPWM5A output with HRPWM channel and ADC start-of-conversion A output."
      },
      {
        "number": "55",
        "name": "GPIO16/SPISIMOA/TZ2",
        "type": "bidirectional",
        "description": "General-purpose I/O 16 (I/O/Z, internal pullup); alternates are SPI-A slave-in/master-out and TZ2 trip-zone input."
      },
      {
        "number": "56",
        "name": "GPIO44/MFSRA/SCIRXDB/EPWM7B",
        "type": "bidirectional",
        "description": "General-purpose I/O 44 (I/O/Z, internal pullup); alternates are McBSP receive frame sync, SCI-B receive data and EPWM7B output."
      },
      {
        "number": "57",
        "name": "GPIO7/EPWM4B/SCIRXDA/ECAP2",
        "type": "bidirectional",
        "description": "General-purpose I/O 7 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternates are EPWM4B output, SCI-A receive data and eCAP2 input/output."
      },
      {
        "number": "58",
        "name": "GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO",
        "type": "bidirectional",
        "description": "General-purpose I/O 6 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternates are EPWM4A output with HRPWM channel, external ePWM sync input and sync output."
      },
      {
        "number": "59",
        "name": "X2",
        "type": "output",
        "description": "On-chip crystal oscillator output; a quartz crystal or ceramic resonator is connected across X1 and X2, and X2 must be left unconnected if not used."
      },
      {
        "number": "60",
        "name": "X1",
        "type": "input",
        "description": "On-chip 1.8-V crystal oscillator input; a crystal or resonator connects across X1 and X2, and the pin must be tied to GND if not used."
      },
      {
        "number": "61",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer power pin; single supply source when VREG is enabled, with a decoupling capacitor on each pin."
      },
      {
        "number": "62",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "63",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital power pin; when using the internal VREG, place one 1.2-µF capacitor between each VDD pin and ground."
      },
      {
        "number": "64",
        "name": "GPIO19",
        "type": "bidirectional",
        "description": "General-purpose I/O 19 (I/O/Z, internal pullup); XCLKIN external oscillator input path is not gated by the mux, so it must not be enabled for clocking when used as another peripheral; may glitch at power-up when VREG is used."
      },
      {
        "number": "65",
        "name": "GPIO53/EQEP1I/MFSXA",
        "type": "bidirectional",
        "description": "General-purpose I/O 53 (I/O/Z, internal pullup); alternates are eQEP1 index and McBSP transmit frame sync."
      },
      {
        "number": "66",
        "name": "GPIO39",
        "type": "bidirectional",
        "description": "General-purpose I/O 39 (I/O/Z, internal pullup); no peripheral alternate functions are listed for this pin."
      },
      {
        "number": "67",
        "name": "GPIO38/XCLKIN/TCK",
        "type": "bidirectional",
        "description": "General-purpose I/O 38 (I/O/Z, default at reset is GPIO38 selection for XCLKIN); TCK is the JTAG test clock with internal pullup and this pin may glitch at power-up when VREG is used."
      },
      {
        "number": "68",
        "name": "GPIO34/COMP2OUT/COMP3OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 34 (I/O/Z, internal pullup); alternates are COMP2OUT and COMP3OUT comparator direct outputs; this pin may glitch at power-up when VREG is used."
      },
      {
        "number": "69",
        "name": "GPIO54/SPISIMOA/EQEP2A/HRCAP1",
        "type": "bidirectional",
        "description": "General-purpose I/O 54 (I/O/Z, internal pullup); alternates are SPI-A slave-in/master-out, eQEP2 input A and HRCAP1 high-resolution capture input."
      },
      {
        "number": "70",
        "name": "GPIO37/TDO",
        "type": "tri_state",
        "description": "General-purpose I/O 37 (I/O/Z); JTAG scan data output TDO with 8-mA drive, shifted out on the falling edge of TCK, and may glitch at power-up when VREG is used."
      },
      {
        "number": "71",
        "name": "GPIO35/TDI",
        "type": "bidirectional",
        "description": "General-purpose I/O 35 (I/O/Z); JTAG test data input TDI with internal pullup, clocked into the selected register on the rising edge of TCK, and may glitch at power-up when VREG is used."
      },
      {
        "number": "72",
        "name": "GPIO36/TMS",
        "type": "bidirectional",
        "description": "General-purpose I/O 36 (I/O/Z); JTAG test-mode select TMS with internal pullup, clocked into the TAP controller on the rising edge of TCK, and may glitch at power-up when VREG is used."
      },
      {
        "number": "73",
        "name": "GPIO11/EPWM6B/SCIRXDB/ECAP1",
        "type": "bidirectional",
        "description": "General-purpose I/O 11 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternates are EPWM6B output, SCI-B receive data and eCAP1 input/output."
      },
      {
        "number": "74",
        "name": "GPIO10/EPWM6A/ADCSOCBO",
        "type": "bidirectional",
        "description": "General-purpose I/O 10 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternates are EPWM6A output with HRPWM channel and ADC start-of-conversion B output."
      },
      {
        "number": "75",
        "name": "GPIO55/SPISOMIA/EQEP2B/HRCAP2",
        "type": "bidirectional",
        "description": "General-purpose I/O 55 (I/O/Z, internal pullup); alternates are SPI-A slave-out/master-in, eQEP2 input B and HRCAP2 high-resolution capture input."
      },
      {
        "number": "76",
        "name": "GPIO41/EPWM7B/SCIRXDB",
        "type": "bidirectional",
        "description": "General-purpose I/O 41 (I/O/Z, internal pullup); alternates are EPWM7B output and SCI-B receive data."
      },
      {
        "number": "77",
        "name": "GPIO27/HRCAP2/EQEP2S/SPISTEB/USB0DM",
        "type": "bidirectional",
        "description": "General-purpose I/O 27 (I/O/Z, internal pullup); alternates are HRCAP2 input, eQEP2 strobe, SPI-B slave transmit enable and USB0DM negative differential signal (enabled via USBIOEN in GPACTRL2); may glitch at power-up when VREG is used."
      },
      {
        "number": "78",
        "name": "GPIO26/ECAP3/EQEP2I/SPICLKB/USB0DP",
        "type": "bidirectional",
        "description": "General-purpose I/O 26 (I/O/Z, internal pullup); alternates are eCAP3 input/output, eQEP2 index, SPI-B clock and USB0DP positive differential signal (enabled via USBIOEN in GPACTRL2); may glitch at power-up when VREG is used."
      },
      {
        "number": "79",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer power pin; single supply source when VREG is enabled, with a decoupling capacitor on each pin."
      },
      {
        "number": "80",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "81",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital power pin; when using the internal VREG, place one 1.2-µF capacitor between each VDD pin and ground."
      },
      {
        "number": "82",
        "name": "GPIO40/EPWM7A/SCITXDB",
        "type": "bidirectional",
        "description": "General-purpose I/O 40 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternates are EPWM7A output with HRPWM channel and SCI-B transmit data."
      },
      {
        "number": "83",
        "name": "GPIO3/EPWM2B/SPISOMIA/COMP2OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 3 (I/O/Z, internal pullup); alternates are EPWM2B output, SPI-A slave-out/master-in and COMP2OUT comparator 2 direct output."
      },
      {
        "number": "84",
        "name": "GPIO2/EPWM2A",
        "type": "bidirectional",
        "description": "General-purpose I/O 2 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternate is EPWM2A output with HRPWM channel."
      },
      {
        "number": "85",
        "name": "GPIO56/SPICLKA/EQEP2I/HRCAP3",
        "type": "bidirectional",
        "description": "General-purpose I/O 56 (I/O/Z, internal pullup); alternates are SPI-A clock, eQEP2 index and HRCAP3 high-resolution capture input."
      },
      {
        "number": "86",
        "name": "GPIO1/EPWM1B/COMP1OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 1 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternates are EPWM1B output and COMP1OUT comparator 1 direct output."
      },
      {
        "number": "87",
        "name": "GPIO0/EPWM1A",
        "type": "bidirectional",
        "description": "General-purpose I/O 0 (I/O/Z, internal pullup, PWM pin pullups not enabled at reset); alternate is EPWM1A output with HRPWM channel."
      },
      {
        "number": "88",
        "name": "GPIO15/ECAP2/SCIRXDB/SPISTEB",
        "type": "bidirectional",
        "description": "General-purpose I/O 15 (I/O/Z, internal pullup); alternates are eCAP2 input/output, SCI-B receive data and SPI-B slave transmit enable."
      },
      {
        "number": "89",
        "name": "GPIO57",
        "type": "bidirectional",
        "description": "General-purpose I/O 57 (I/O/Z, internal pullup); alternates are SPI-A slave transmit enable, eQEP2 strobe and HRCAP4 high-resolution capture input."
      },
      {
        "number": "90",
        "name": "VREGENZ",
        "type": "input",
        "description": "Internal voltage regulator enable with internal pulldown; tie to VSS to enable the internal 1.8-V VREG, or to VDDIO to disable it and use an external 1.8-V supply."
      },
      {
        "number": "91",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital power pin; when using the internal VREG, place one 1.2-µF capacitor between each VDD pin and ground."
      },
      {
        "number": "92",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "93",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer power pin; single supply source when VREG is enabled, with a decoupling capacitor on each pin."
      },
      {
        "number": "94",
        "name": "GPIO58/MCLKRA/SCITXDB/EPWM7A",
        "type": "bidirectional",
        "description": "General-purpose I/O 58 (I/O/Z, internal pullup); alternates are McBSP receive clock, SCI-B transmit data and EPWM7A output."
      },
      {
        "number": "95",
        "name": "GPIO13",
        "type": "bidirectional",
        "description": "General-purpose I/O 13 (I/O/Z, internal pullup); alternates are TZ2 trip-zone input and SPI-B slave-out/master-in."
      },
      {
        "number": "96",
        "name": "GPIO14",
        "type": "bidirectional",
        "description": "General-purpose I/O 14 (I/O/Z, internal pullup); alternates are TZ3 trip-zone input, SCI-B transmit data and SPI-B clock."
      },
      {
        "number": "97",
        "name": "GPIO24/ECAP1/EQEP2A/SPISIMOB",
        "type": "bidirectional",
        "description": "General-purpose I/O 24 (I/O/Z, internal pullup); alternates are eCAP1 input/output, eQEP2 input A (PZ/PZP only) and SPI-B slave-in/master-out."
      },
      {
        "number": "98",
        "name": "GPIO22/EQEP1S/MCLKXA/SCITXDB",
        "type": "bidirectional",
        "description": "General-purpose I/O 22 (I/O/Z, internal pullup); alternates are eQEP1 strobe, McBSP transmit clock and SCI-B transmit data."
      },
      {
        "number": "99",
        "name": "GPIO32/SDAA/EPWMSYNCI/ADCSOCAO",
        "type": "bidirectional",
        "description": "General-purpose I/O 32 (I/O/Z, internal pullup); alternates are I2C data (open-drain), external ePWM sync input and ADC start-of-conversion A output."
      },
      {
        "number": "100",
        "name": "GPIO33/SCLA/EPWMSYNCO/ADCSOCBO",
        "type": "bidirectional",
        "description": "General-purpose I/O 33 (I/O/Z, internal pullup); alternates are I2C clock (open-drain), external ePWM sync output and ADC start-of-conversion B output; may glitch at power-up when VREG is used."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package variant: the MPN TMS320F28062FPZT is the 100-pin LQFP (PZ) per the package addendum (page 17; Pin names were taken from the signal-description tables, not the pin diagram. The pin-diagram text (; Shared pins: pin 64 (GPIO19/XCLKIN) and pin 67 (GPIO38/XCLKIN/TCK) both carry XCLKIN; pin 67 is the "
        ],
        "pages_sent": 43,
        "cost_usd": 0.3511,
        "at": "2026-10-07T21:44:49"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tms320f28062f",
        "pages": 206,
        "sha256": "3033efed856fc72a",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 100,
        "described": 100,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tms320f28062fpzt.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          16,
          16,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "51720097260ffba41c3062f85f67623721102fa535901c47cb555a1f444feeb3",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tms320f28062fpzt-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          16,
          16,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "198a3bd49577c107bfb418126f6bacc35fbbc158bc5a03d4691a26a3cc3751cf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "LQFP-100(14x14)",
      "Category": "Embedded Processors & Controllers",
      "Pins": "100"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "tms320f28062fpzt"
  ],
  "discovery_pitch": "TMS320F28062FPZT (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tms320f28062fpzt.kicad_sym",
    "tms320f28062fpzt.kicad_mod",
    "tms320f28062fpzt.glb",
    "tms320f28062fpzt.step",
    "tms320f28062fpzt.lbr",
    "docs/hero.png",
    "docs/tms320f28062fpzt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tms320f28062fpzt-hero.glb",
    "tms320f28062fpzt-hero.overlay.json"
  ],
  "visibility": {
    "public": true
  }
}