component
TMS320F28034RSHT
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-56-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "tms320f28034rsht",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-56-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"tms320f28034rsht",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"tms320f28034rsht.kicad_sym",
"tms320f28034rsht.kicad_mod",
"tms320f28034rsht.glb",
"tms320f28034rsht.step",
"tms320f28034rsht.lbr",
"docs/hero.png",
"docs/tms320f28034rsht-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"tms320f28034rsht-hero.glb",
"tms320f28034rsht-hero.overlay.json"
],
"component": {
"mpn": "TMS320F28034RSHT",
"manufacturer": "Texas Instruments",
"package": "VQFN-56-EP(7x7)",
"pin_count": 57,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://www.ti.com/cn/lit/gpn/tms320f28033",
"parts": {
"symbol": "tms320f28034rsht.kicad_sym",
"footprint": "tms320f28034rsht.kicad_mod",
"model_3d": "tms320f28034rsht-hero.glb",
"model_3d_plain": "tms320f28034rsht.glb",
"model_3d_step": "tms320f28034rsht-etched.step",
"model_3d_step_plain": "tms320f28034rsht.step",
"lbr": "tms320f28034rsht.lbr"
},
"distributor_links": {
"lcsc": "C1344590",
"digikey": "TMS320F28034RSHT-ND",
"mouser": "595-TMS320F28034RSHT"
},
"distributor_check": {
"checked_at": "2026-10-11T23:51:30Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "TMS320F28034RSHT-ND",
"status": "found"
},
"mouser": {
"pn": "595-TMS320F28034RSHT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "GPIO22/EQEP1S/LINTXA",
"type": "bidirectional",
"description": "General-purpose I/O 22 with internal pull-up enabled after reset, alternating to EQEP1 strobe (I/O) and LIN transmit (output); inputs are not 5 V tolerant."
},
{
"number": "2",
"name": "GPIO23/EQEP1I/LINRXA",
"type": "bidirectional",
"description": "General-purpose I/O 23 with internal pull-up enabled after reset, alternating to EQEP1 index (I/O) and LIN receive (input); inputs are not 5 V tolerant."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "CPU and logic digital supply; with the internal VREG enabled place at least 1.2 µF from each VDD pin to ground, or supply 1.71-1.995 V externally when VREG is disabled."
},
{
"number": "4",
"name": "VSS",
"type": "power_in",
"description": "Digital ground pin."
},
{
"number": "5",
"name": "XRS",
"type": "bidirectional",
"description": "Device reset input and watchdog reset output (open-drain with internal pull-up), driven low during POR/BOR and for 512 OSCCLK cycles on a watchdog reset; use a 2.2 kΩ to 10 kΩ resistor from XRS to VDDIO and a capacitor of 100 nF or less to VSS if filtering is required."
},
{
"number": "6",
"name": "TRST",
"type": "input",
"description": "JTAG test reset with internal pull-down; it must be held low during normal operation and an external pull-up (about 2.2 kΩ typical) is required on this pin."
},
{
"number": "7",
"name": "ADCINA7",
"type": "input",
"description": "ADC group A channel 7 analog input."
},
{
"number": "8",
"name": "ADCINA6/COMP3A/AIO6",
"type": "input",
"description": "ADC group A channel 6 analog input, also comparator 3A input and digital AIO6; an unused ADC input that is shared with AIO should be connected to ground through a 1 kΩ resistor, not directly."
},
{
"number": "9",
"name": "ADCINA4/COMP2A/AIO4",
"type": "input",
"description": "ADC group A channel 4 analog input, also comparator 2A input and digital AIO4; unused shared inputs should go to ground through 1 kΩ."
},
{
"number": "10",
"name": "ADCINA3",
"type": "input",
"description": "ADC group A channel 3 analog input, 0 V to 3.3 V full scale with the internal reference."
},
{
"number": "11",
"name": "ADCINA2/COMP1A/AIO2",
"type": "input",
"description": "ADC group A channel 2 analog input, also comparator 1A input and digital AIO2; unused shared inputs should go to ground through 1 kΩ."
},
{
"number": "12",
"name": "ADCINA1",
"type": "input",
"description": "ADC group A channel 1 analog input."
},
{
"number": "13",
"name": "ADCINA0/VREFHI",
"type": "input",
"description": "ADC group A channel 0 analog input, shared with the external ADC reference VREFHI (external reference mode only); it cannot be used as both at the same time, and VREFHI must not exceed VDDA."
},
{
"number": "14",
"name": "VDDA",
"type": "power_in",
"description": "Analog supply, 2.97 V to 3.63 V (3.3 V nominal); place a 2.2 µF (typical) capacitor near this pin."
},
{
"number": "15",
"name": "VSSA/VREFLO",
"type": "power_in",
"description": "Analog ground; the ADC low reference VREFLO is always connected to VSSA on the 56-pin RSH device."
},
{
"number": "16",
"name": "ADCINB1",
"type": "input",
"description": "ADC group B channel 1 analog input."
},
{
"number": "17",
"name": "ADCINB2/COMP1B/AIO10",
"type": "input",
"description": "ADC group B channel 2 analog input, also comparator 1B input and digital AIO10; unused shared inputs should go to ground through 1 kΩ."
},
{
"number": "18",
"name": "ADCINB3",
"type": "input",
"description": "ADC group B channel 3 analog input."
},
{
"number": "19",
"name": "ADCINB4/COMP2B/AIO12",
"type": "input",
"description": "ADC group B channel 4 analog input, also comparator 2B input and digital AIO12; unused shared inputs should go to ground through 1 kΩ."
},
{
"number": "20",
"name": "ADCINB6/COMP3B/AIO14",
"type": "input",
"description": "ADC group B channel 6 analog input, also comparator 3B input and digital AIO14; unused shared inputs should go to ground through 1 kΩ."
},
{
"number": "21",
"name": "ADCINB7",
"type": "input",
"description": "ADC group B channel 7 analog input."
},
{
"number": "22",
"name": "GPIO31/CANTXA",
"type": "bidirectional",
"description": "General-purpose I/O 31 with internal pull-up enabled after reset, alternating to eCAN transmit (CANTXA, output)."
},
{
"number": "23",
"name": "GPIO30/CANRXA",
"type": "bidirectional",
"description": "General-purpose I/O 30 with internal pull-up enabled after reset, alternating to eCAN receive (CANRXA, input)."
},
{
"number": "24",
"name": "GPIO29/SCITXDA/SCLA/TZ3",
"type": "bidirectional",
"description": "General-purpose I/O 29 alternating to SCI-A transmit (output), I2C-A clock (open-drain I/O) and trip-zone input TZ3."
},
{
"number": "25",
"name": "VSS",
"type": "power_in",
"description": "Digital ground pin."
},
{
"number": "26",
"name": "VDDIO",
"type": "power_in",
"description": "Digital I/O buffer and flash supply, 2.97 V to 3.63 V (3.3 V nominal); place a decoupling capacitor on each VDDIO pin."
},
{
"number": "27",
"name": "TEST2",
"type": "unconnected",
"description": "Reserved for TI; must be left unconnected on the application board."
},
{
"number": "28",
"name": "GPIO28/SCIRXDA/SDAA/TZ2",
"type": "bidirectional",
"description": "General-purpose I/O 28 alternating to SCI-A receive (input), I2C-A data (open-drain I/O) and trip-zone input TZ2."
},
{
"number": "29",
"name": "GPIO18/SPICLKA/LINTXA/XCLKOUT",
"type": "bidirectional",
"description": "General-purpose I/O 18 alternating to SPI-A clock, LIN transmit and XCLKOUT output (SYSCLKOUT/4 at reset, controlled by XCLKOUTDIV)."
},
{
"number": "30",
"name": "GPIO17/SPISOMIA/TZ3",
"type": "bidirectional",
"description": "General-purpose I/O 17 alternating to SPI-A slave output/master input and trip-zone input TZ3."
},
{
"number": "31",
"name": "GPIO16/SPISIMOA/TZ2",
"type": "bidirectional",
"description": "General-purpose I/O 16 alternating to SPI-A slave input/master output and trip-zone input TZ2."
},
{
"number": "32",
"name": "GPIO12/TZ1/SCITXDA",
"type": "bidirectional",
"description": "General-purpose I/O 12 alternating to trip-zone input TZ1 and SCI-A transmit (output)."
},
{
"number": "33",
"name": "GPIO7/EPWM4B/SCIRXDA",
"type": "bidirectional",
"description": "General-purpose I/O 7 alternating to ePWM4B output and SCI-A receive (input)."
},
{
"number": "34",
"name": "GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO",
"type": "bidirectional",
"description": "General-purpose I/O 6 alternating to ePWM4A output (with HRPWM), external ePWM sync input and sync output."
},
{
"number": "35",
"name": "X2",
"type": "output",
"description": "On-chip crystal oscillator output; a crystal or ceramic resonator must be connected between X1 and X2, and X2 must be left unconnected if not used."
},
{
"number": "36",
"name": "X1",
"type": "input",
"description": "1.8 V on-chip crystal oscillator input that must not be driven with 3.3 V levels; it must be connected to GND if not used."
},
{
"number": "37",
"name": "VSS",
"type": "power_in",
"description": "Digital ground pin."
},
{
"number": "38",
"name": "VDD",
"type": "power_in",
"description": "CPU and logic digital supply; with the internal VREG enabled place at least 1.2 µF from each VDD pin to ground."
},
{
"number": "39",
"name": "GPIO19/XCLKIN/SPISTEA/LINRXA/ECAP1",
"type": "bidirectional",
"description": "General-purpose I/O 19 that also serves as the external oscillator/clock input XCLKIN (3.3 V), alternating to SPI-A slave transmit enable, LIN receive and eCAP1; it can show a power-on glitch when the internal VREG is used."
},
{
"number": "40",
"name": "GPIO38/TCK/XCLKIN",
"type": "bidirectional",
"description": "General-purpose I/O 38 that is also the JTAG test clock TCK (internal pull-up) and an alternate XCLKIN input; if used for an external clock, an alternate clock source is needed during JTAG debug."
},
{
"number": "41",
"name": "GPIO37/TDO",
"type": "tri_state",
"description": "JTAG scan data output TDO (8 mA drive), shifted out on the TCK falling edge; the pin is also GPIO37 and can show a power-on glitch when the internal VREG is used."
},
{
"number": "42",
"name": "GPIO35/TDI",
"type": "bidirectional",
"description": "General-purpose I/O 35 that is also the JTAG test data input TDI with internal pull-up, clocked on the TCK rising edge; it can show a power-on glitch when the internal VREG is used."
},
{
"number": "43",
"name": "GPIO36/TMS",
"type": "bidirectional",
"description": "General-purpose I/O 36 that is also the JTAG test mode select TMS with internal pull-up, clocked on the TCK rising edge; it can show a power-on glitch when the internal VREG is used."
},
{
"number": "44",
"name": "GPIO5/EPWM3B/SPISIMOA/ECAP1",
"type": "bidirectional",
"description": "General-purpose I/O 5 alternating to ePWM3B output, SPI-A slave input/master output and eCAP1 I/O."
},
{
"number": "45",
"name": "GPIO4/EPWM3A",
"type": "bidirectional",
"description": "General-purpose I/O 4 alternating to ePWM3A output (with HRPWM)."
},
{
"number": "46",
"name": "GPIO3/EPWM2B/SPISOMIA/COMP2OUT",
"type": "bidirectional",
"description": "General-purpose I/O 3 alternating to ePWM2B output, SPI-A slave output/master input and comparator 2 direct output."
},
{
"number": "47",
"name": "GPIO2/EPWM2A",
"type": "bidirectional",
"description": "General-purpose I/O 2 alternating to ePWM2A output (with HRPWM)."
},
{
"number": "48",
"name": "GPIO1/EPWM1B/COMP1OUT",
"type": "bidirectional",
"description": "General-purpose I/O 1 alternating to ePWM1B output and comparator 1 direct output."
},
{
"number": "49",
"name": "GPIO0/EPWM1A",
"type": "bidirectional",
"description": "General-purpose I/O 0 alternating to ePWM1A output (with HRPWM)."
},
{
"number": "50",
"name": "VDDIO",
"type": "power_in",
"description": "Digital I/O buffer and flash supply, 2.97 V to 3.63 V (3.3 V nominal); place a decoupling capacitor on each VDDIO pin."
},
{
"number": "51",
"name": "VSS",
"type": "power_in",
"description": "Digital ground pin."
},
{
"number": "52",
"name": "VDD",
"type": "power_in",
"description": "CPU and logic digital supply; with the internal VREG enabled place at least 1.2 µF from each VDD pin to ground."
},
{
"number": "53",
"name": "VREGENZ",
"type": "input",
"description": "Internal regulator enable with internal pull-down: connect to VSS to enable the internal 1.8 V VREG, or to VDDIO to disable it and use an external 1.8 V VDD supply."
},
{
"number": "54",
"name": "GPIO34/COMP2OUT/COMP3OUT",
"type": "bidirectional",
"description": "General-purpose I/O 34 alternating to comparator 2 and comparator 3 direct outputs; it can show a power-on glitch when the internal VREG is used."
},
{
"number": "55",
"name": "GPIO20/EQEP1A/COMP1OUT",
"type": "bidirectional",
"description": "General-purpose I/O 20 alternating to EQEP1 input A and comparator 1 direct output."
},
{
"number": "56",
"name": "GPIO21/EQEP1B/COMP2OUT",
"type": "bidirectional",
"description": "General-purpose I/O 21 alternating to EQEP1 input B and comparator 2 direct output."
},
{
"number": "57",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package requested as VQFN-56-EP(7x7). The datasheet only lists the 56-pin RSH VQFN, 7.0 mm x 7.0 mm ; ADCINA0 and VREFHI share pin 13. They cannot be used at the same time, and VREFHI is used only in ex; VREFLO is always connected to VSSA on the RSH device, and both share pin 15. Typed as power_in (grou",
"exposed pad 57 added from the footprint"
],
"pages_sent": 120,
"cost_usd": 0.8367,
"at": "2026-10-11T23:51:06"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/tms320f28033",
"pages": 176,
"sha256": "cb9ccecfd6b5c484",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 57,
"described": 57,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "tms320f28034rsht.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.885
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "b42d9b0c7a8d55564f4e9bb74be3ab877d958a268411c07a496787496cfb1b99",
"checked": "2026-10-11",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tms320f28034rsht-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.885
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "942c028ff7e4072b00d95f1ba16a9f584326f7917baa6970b98e0a5b129435a6",
"checked": "2026-10-11",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}