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Ray Publish 0.1.0 36b1885 16d ago
{
  "slug": "tms320f28034pags",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "tms320f28034pags",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tms320f28034pags.kicad_sym",
    "tms320f28034pags.kicad_mod",
    "tms320f28034pags.glb",
    "tms320f28034pags.step",
    "tms320f28034pags.lbr",
    "docs/hero.png",
    "docs/tms320f28034pags-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tms320f28034pags-hero.glb",
    "tms320f28034pags-hero.overlay.json"
  ],
  "component": {
    "mpn": "TMS320F28034PAGS",
    "manufacturer": "Texas Instruments",
    "package": "TQFP-64(10x10)",
    "pin_count": 64,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tms320f28033",
    "parts": {
      "symbol": "tms320f28034pags.kicad_sym",
      "footprint": "tms320f28034pags.kicad_mod",
      "model_3d": "tms320f28034pags-hero.glb",
      "model_3d_plain": "tms320f28034pags.glb",
      "model_3d_step": "tms320f28034pags-etched.step",
      "model_3d_step_plain": "tms320f28034pags.step",
      "lbr": "tms320f28034pags.lbr"
    },
    "distributor_links": {
      "lcsc": "C1342892",
      "digikey": "TMS320F28034PAGS-ND",
      "mouser": "595-TMS320F28034PAGS"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T03:38:32Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "TMS320F28034PAGS-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-TMS320F28034PAGS",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "GPIO22/EQEP1S/LINTXA",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO22 with internal pull-up selectable per pin; alternate functions are EQEP1S strobe I/O and LINTXA LIN transmit output."
      },
      {
        "number": "2",
        "name": "GPIO32/SDAA/EPWMSYNCI/ADCSOCAO",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO32 whose alternate I2C data SDAA is an open-drain I/O, with EPWMSYNCI input and ADCSOCAO output as other alternate functions."
      },
      {
        "number": "3",
        "name": "GPIO33/SCLA/EPWMSYNCO/ADCSOCBO",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO33 whose alternate I2C clock SCLA is an open-drain I/O, with EPWMSYNCO and ADCSOCBO outputs as other alternate functions."
      },
      {
        "number": "4",
        "name": "GPIO23/EQEP1I/LINRXA",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO23 with alternate functions EQEP1I index I/O and LINRXA LIN receive input."
      },
      {
        "number": "5",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital supply; when the internal VREG is used, a 1.2 µF (minimum) capacitor must be placed between each VDD pin and ground."
      },
      {
        "number": "6",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "7",
        "name": "XRS",
        "type": "bidirectional",
        "description": "Device reset input and watchdog reset output; open-drain with internal pull-up, driven low on power-on/brown-out, with a 2.2 kΩ to 10 kΩ resistor to VDDIO recommended."
      },
      {
        "number": "8",
        "name": "TRST",
        "type": "input",
        "description": "JTAG test reset with internal pull-down that must be held low during normal device operation and requires an external pull-up (2.2 kΩ typical, board-dependent)."
      },
      {
        "number": "9",
        "name": "ADCINA7",
        "type": "input",
        "description": "ADC group A channel 7 analog input."
      },
      {
        "number": "10",
        "name": "ADCINA6/COMP3A/AIO6",
        "type": "input",
        "description": "ADC group A channel 6 analog input, multiplexed with comparator 3A input and digital AIO6."
      },
      {
        "number": "11",
        "name": "ADCINA4/COMP2A/AIO4",
        "type": "input",
        "description": "ADC group A channel 4 analog input, multiplexed with comparator 2A input and digital AIO4."
      },
      {
        "number": "12",
        "name": "ADCINA3",
        "type": "input",
        "description": "ADC group A channel 3 analog input."
      },
      {
        "number": "13",
        "name": "ADCINA2/COMP1A/AIO2",
        "type": "input",
        "description": "ADC group A channel 2 analog input, multiplexed with comparator 1A input and digital AIO2."
      },
      {
        "number": "14",
        "name": "ADCINA1",
        "type": "input",
        "description": "ADC group A channel 1 analog input."
      },
      {
        "number": "15",
        "name": "ADCINA0/VREFHI",
        "type": "input",
        "description": "ADC group A channel 0 input that shares the pin with VREFHI (external ADC reference high, used only in external reference mode); the two functions cannot be used at the same time."
      },
      {
        "number": "16",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog power pin; a 2.2 µF capacitor (typical) should be connected near this pin."
      },
      {
        "number": "17",
        "name": "VSSA/VREFLO",
        "type": "power_in",
        "description": "Analog ground pin; VREFLO is always connected to VSSA on the 64-pin PAG device."
      },
      {
        "number": "18",
        "name": "ADCINB0",
        "type": "input",
        "description": "ADC group B channel 0 analog input."
      },
      {
        "number": "19",
        "name": "ADCINB1",
        "type": "input",
        "description": "ADC group B channel 1 analog input."
      },
      {
        "number": "20",
        "name": "ADCINB2/COMP1B/AIO10",
        "type": "input",
        "description": "ADC group B channel 2 analog input, multiplexed with comparator 1B input and digital AIO10."
      },
      {
        "number": "21",
        "name": "ADCINB3",
        "type": "input",
        "description": "ADC group B channel 3 analog input."
      },
      {
        "number": "22",
        "name": "ADCINB4/COMP2B/AIO12",
        "type": "input",
        "description": "ADC group B channel 4 analog input, multiplexed with comparator 2B input and digital AIO12."
      },
      {
        "number": "23",
        "name": "ADCINB6/COMP3B/AIO14",
        "type": "input",
        "description": "ADC group B channel 6 analog input, multiplexed with comparator 3B input and digital AIO14."
      },
      {
        "number": "24",
        "name": "ADCINB7",
        "type": "input",
        "description": "ADC group B channel 7 analog input."
      },
      {
        "number": "25",
        "name": "GPIO31/CANTXA",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO31 with CAN transmit output CANTXA as alternate function."
      },
      {
        "number": "26",
        "name": "GPIO30/CANRXA",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO30 with CAN receive input CANRXA as alternate function."
      },
      {
        "number": "27",
        "name": "GPIO29/SCITXDA/SCLA/TZ3",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO29 with alternate functions SCI-A transmit output SCITXDA, open-drain I2C clock SCLA, and trip-zone input TZ3."
      },
      {
        "number": "28",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "29",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer and flash supply; a single supply is used when VREG is enabled, and a decoupling capacitor is placed on each VDDIO pin."
      },
      {
        "number": "30",
        "name": "TEST2",
        "type": "unconnected",
        "description": "Test pin reserved for TI that must be left unconnected."
      },
      {
        "number": "31",
        "name": "GPIO9/EPWM5B/LINTXA/HRCAP1",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO9 with alternate functions ePWM5B output, LIN transmit LINTXA output, and high-resolution capture input HRCAP1."
      },
      {
        "number": "32",
        "name": "GPIO28/SCIRXDA/SDAA/TZ2",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO28 with alternate functions SCI-A receive input SCIRXDA, open-drain I2C data SDAA, and trip-zone input TZ2."
      },
      {
        "number": "33",
        "name": "GPIO18/SPICLKA/LINTXA/XCLKOUT",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO18 with alternate functions SPI-A clock, LIN transmit output, and XCLKOUT (derived from SYSCLKOUT, equal to SYSCLKOUT/4 after reset)."
      },
      {
        "number": "34",
        "name": "GPIO17/SPISOMIA/TZ3",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO17 with alternate functions SPI-A slave-out/master-in SPISOMIA and trip-zone input TZ3."
      },
      {
        "number": "35",
        "name": "GPIO8/EPWM5A/ADCSOCAO",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO8 with alternate functions ePWM5A output (HRPWM channel) and ADC start-of-conversion output ADCSOCAO."
      },
      {
        "number": "36",
        "name": "GPIO16/SPISIMOA/TZ2",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO16 with alternate functions SPI-A slave-in/master-out SPISIMOA and trip-zone input TZ2."
      },
      {
        "number": "37",
        "name": "GPIO12/TZ1/SCITXDA",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO12 with alternate functions trip-zone input TZ1 and SCI-A transmit output SCITXDA; the SPISIMOB alternate is not available on the PAG package."
      },
      {
        "number": "38",
        "name": "GPIO7/EPWM4B/SCIRXDA",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO7 with alternate functions ePWM4B output and SCI-A receive input SCIRXDA."
      },
      {
        "number": "39",
        "name": "GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO6 with alternate functions ePWM4A output (HRPWM channel), external ePWM sync input EPWMSYNCI, and sync output EPWMSYNCO."
      },
      {
        "number": "40",
        "name": "X2",
        "type": "output",
        "description": "On-chip crystal oscillator output; a crystal or ceramic resonator must be connected between X1 and X2, and X2 must be left unconnected if unused."
      },
      {
        "number": "41",
        "name": "X1",
        "type": "input",
        "description": "1.8 V on-chip crystal oscillator input that must not be driven with 3.3 V signals; if unused it must be connected to GND."
      },
      {
        "number": "42",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "43",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital supply; when the internal VREG is used, a 1.2 µF (minimum) capacitor must be placed between each VDD pin and ground."
      },
      {
        "number": "44",
        "name": "GPIO19/XCLKIN/SPISTEA/LINRXA/ECAP1",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO19 that also provides the XCLKIN external oscillator input path (not controlled by this pin's mux), with alternate functions SPI-A slave transmit enable SPISTEA, LIN receive LINRXA, and eCAP1 I/O."
      },
      {
        "number": "45",
        "name": "GPIO38/TCK/XCLKIN",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO38 that serves as JTAG test clock TCK (internal pull-up) and external oscillator input XCLKIN; it is the default XCLKIN source and must not be used as a clock source during JTAG debug."
      },
      {
        "number": "46",
        "name": "GPIO37/TDO",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO37 that serves as JTAG scan data output TDO with 8 mA drive."
      },
      {
        "number": "47",
        "name": "GPIO35/TDI",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO35 that serves as JTAG test data input TDI with internal pull-up."
      },
      {
        "number": "48",
        "name": "GPIO36/TMS",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO36 that serves as JTAG test mode select TMS with internal pull-up."
      },
      {
        "number": "49",
        "name": "GPIO11/EPWM6B/LINRXA/HRCAP2",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO11 with alternate functions ePWM6B output, LIN receive LINRXA, and high-resolution capture input HRCAP2."
      },
      {
        "number": "50",
        "name": "GPIO5/EPWM3B/SPISIMOA/ECAP1",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO5 with alternate functions ePWM3B output, SPI-A SPISIMOA, and eCAP1 I/O."
      },
      {
        "number": "51",
        "name": "GPIO4/EPWM3A",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO4 with alternate function ePWM3A output (HRPWM channel)."
      },
      {
        "number": "52",
        "name": "GPIO10/EPWM6A/ADCSOCBO",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO10 with alternate functions ePWM6A output (HRPWM channel) and ADC start-of-conversion output ADCSOCBO."
      },
      {
        "number": "53",
        "name": "GPIO3/EPWM2B/SPISOMIA/COMP2OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO3 with alternate functions ePWM2B output, SPI-A SPISOMIA, and direct comparator 2 output COMP2OUT."
      },
      {
        "number": "54",
        "name": "GPIO2/EPWM2A",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO2 with alternate function ePWM2A output (HRPWM channel)."
      },
      {
        "number": "55",
        "name": "GPIO1/EPWM1B/COMP1OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO1 with alternate functions ePWM1B output and direct comparator 1 output COMP1OUT."
      },
      {
        "number": "56",
        "name": "GPIO0/EPWM1A",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO0 with alternate function ePWM1A output (HRPWM channel)."
      },
      {
        "number": "57",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer and flash supply; a single supply is used when VREG is enabled, and a decoupling capacitor is placed on each VDDIO pin."
      },
      {
        "number": "58",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "59",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital supply; when the internal VREG is used, a 1.2 µF (minimum) capacitor must be placed between each VDD pin and ground."
      },
      {
        "number": "60",
        "name": "VREGENZ",
        "type": "input",
        "description": "Internal regulator enable with internal pull-down; connect directly to VSS to enable the internal 1.8 V VREG, or to VDDIO to disable it and use an external 1.8 V supply."
      },
      {
        "number": "61",
        "name": "GPIO34/COMP2OUT/COMP3OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO34 with alternate functions direct comparator outputs COMP2OUT and COMP3OUT; it may glitch during power-up when the on-chip VREG is used."
      },
      {
        "number": "62",
        "name": "GPIO20/EQEP1A/COMP1OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO20 with alternate functions EQEP1A input and direct comparator 1 output COMP1OUT."
      },
      {
        "number": "63",
        "name": "GPIO21/EQEP1B/COMP2OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO21 with alternate functions EQEP1B input and direct comparator 2 output COMP2OUT."
      },
      {
        "number": "64",
        "name": "GPIO24/ECAP1",
        "type": "bidirectional",
        "description": "General-purpose I/O GPIO24 with alternate function eCAP1 I/O; the SPISIMOB alternate is not available on the PAG package."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 15 is shared between ADCINA0 and VREFHI; the datasheet states they cannot be used simultaneously; Pins 45-48 and 37 are GPIO-muxed JTAG/XCLKIN/peripheral pins; they are typed as bidirectional (GPIO ; TEST2 is listed as I/O in Table 5-1 but the datasheet states it is reserved for TI and must remain u"
        ],
        "pages_sent": 120,
        "cost_usd": 0.8494,
        "at": "2026-10-11T03:38:06"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tms320f28033",
        "pages": 176,
        "sha256": "cb9ccecfd6b5c484",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 64,
        "described": 64,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tms320f28034pags.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          12.0,
          12.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "60567e81b0770b6c519104183a7a05ba52dddc11146b5fbe21434fbb5801696c",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tms320f28034pags-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          12.0,
          12.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5dab76240819282213f82966741a87b87eca8d43ca7a044efa062c77f77aefd3",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}