# TMP126NDCKR

**TEXAS INSTRUMENTS** · Global Sourcing Parts · SC-70-6

TMP126NDCKR from TEXAS INSTRUMENTS, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip select signal to activate the SPI interface; input tolerates -0.3 V to 6 V. |
| 2 | GND | power_in | Ground. |
| 3 | SIO | bidirectional | System data input/output for the 3-wire SPI interface; voltage range -0.3 V to VDD + 0.2 V. |
| 4 | SCLK | input | System clock input for the SPI interface; input tolerates -0.3 V to 6 V. |
| 5 | ALERT | bidirectional | Alert open-drain output that can be left floating or grounded when not used; voltage range -0.3 V to 6 V. |
| 6 | VDD | power_in | Supply voltage, 1.62 V to 5.5 V recommended operating range. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TEXAS INSTRUMENTS |
| Package | SC-70-6 |
| Category | Global Sourcing Parts |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Temperature accuracy TMP126N | TERR | -0.8 |  | 0.8 | °C | -40 °C to 150 °C, 1-Hz conversion cycle | 5 |
| Active conversion time | tCONV | 4.5 | 6 | 7.5 | ms |  | 5 |
| Timing variation | tVAR | -15 |  | 15 | % | Conversion Period, Slew Rate Result, Slew Rate Limit | 5 |
| Input logic high level | VIH | 0.7 |  |  | V | SCLK, SIO, CS; min 0.7 * VDD, max VDD | 5 |
| Input logic low level | VIL | 0 |  | 0.3 | V | SCLK, SIO, CS; max 0.3 * VDD | 5 |
| Input leakage current | IIN | -0.5 |  | 0.5 | μA | SCLK, SIO, CS | 5 |
| SIO output low level | VOL | 0 |  | 0.4 | V | IOL = -3 mA | 5 |
| ALERT output logic low level | VOL | 0 |  | 0.4 | V | IOL = -3 mA | 5 |
| Supply current during active conversion | IDD_ACTIVE |  | 77 | 135 | μA | CS = VDD, TA = -55 °C to 150 °C (max); typ 77 at TA = 25 °C | 6 |
| Average current consumption | IDD |  | 1 | 16 | μA | CS = VDD, conversion cycle time: 1 Hz, TA = -55 °C to 150 °C (max) | 6 |
| Standby current | ISB |  | 0.5 | 15 | μA | CS = VDD, TA = -55 °C to 150 °C (max) | 6 |
| Shutdown current | ISD |  | 0.35 | 15 | μA | CS = VDD, TA = -55 °C to 150 °C (max) | 6 |
| SCLK frequency | fCLK |  |  | 10 | MHz |  | 7 |
| SCLK Period | tCLK | 100 |  |  | ns |  | 7 |
| CS falling to SCLK rising setup | tLEAD | 100 |  |  | ns |  | 7 |
| SCLK rising to CS rising setup | tLAG | 20 |  |  | ns |  | 7 |
| SIO to SCLK rising edge setup | tSU | 10 |  |  | ns |  | 7 |
| SIO hold time after SCLK rising edge | tHOLD | 20 |  |  | ns |  | 7 |
| SCLK falling to valid SIO data | tVALID |  |  | 35 | ns |  | 7 |
| CS rising to SIO high-impedance | tSIO(DIS) |  |  | 200 | ns |  | 7 |
| SIO, SCLK, CS rise time | tRISE |  |  | 100 | ns |  | 7 |
| SIO, SCLK, CS fall time | tFALL |  |  | 100 | ns |  | 7 |
| Delay between SPI sequences (CS high) | tINTERFRAME | 100 |  |  | ns |  | 7 |
| Delay between valid VDD and initial SPI communication | tINITIATION | 0.5 |  |  | ms |  | 7 |
| Supply voltage | VDD | -0.3 |  | 6 | V |  | 4 |
| I/O voltage SIO |  | -0.3 |  | 0.2 | V | max VDD + 0.2 V | 4 |
| I/O voltage CS, ALERT, SCLK |  | -0.3 |  | 6 | V |  | 4 |
| Operating junction temperature TMP126N | TJ | -45 |  | 155 | °C | TMP126N | 4 |
| Storage temperature | Tstg | -65 |  | 180 | °C |  | 4 |
| ESD HBM | V(ESD) | -2000 |  | 2000 | V | Human-body model per JESD22-A114 | 4 |
| ESD CDM | V(ESD) | -750 |  | 750 | V | Charged-device model per JESD22-C101 | 4 |
| Supply voltage | VDD | 1.62 | 3.3 | 5.5 | V |  | 4 |
| I/O voltage SIO | VI/O | 0 |  |  | V | max VDD | 4 |
| I/O voltage CS, ALERT, SCLK | VI/O | 0 |  | 5.5 | V |  | 4 |
| Operating ambient temperature TMP126N | TA | -40 |  | 150 | °C | TMP126N | 4 |
| Junction-to-ambient thermal resistance | RθJA |  | 183.4 |  | °C/W | DCK (SC70) 6 pins | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 136.4 |  | °C/W | DCK (SC70) 6 pins | 4 |
| Junction-to-board thermal resistance | RθJB |  | 74.2 |  | °C/W | DCK (SC70) 6 pins | 4 |
| Junction-to-top characterization parameter | ψJT |  | 57.9 |  | °C/W | DCK (SC70) 6 pins | 4 |
| Junction-to-board characterization parameter | ψJB |  | 74 |  | °C/W | DCK (SC70) 6 pins | 4 |
| DC power supply rejection | PSR |  | 12.7 |  | m°C/V | One-shot mode | 5 |
| Temperature resolution LSB | TRES |  | 31.25 |  | m°C | LSB | 5 |
| Long-term stability and drift | TLTD |  | 0.07 |  | °C | 1000 hours at 175 °C | 5 |
| Power-on reset threshold voltage | VPOR |  | 1.3 |  | V | Supply rising | 6 |

## CAD (KiCad official)

- Symbol: `TMP126NDCKR`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files: `tmp126ndckr-etched.step` / `tmp126ndckr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tmp126ndckr.step` / `tmp126ndckr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TEXAS INSTRUMENTS datasheet](https://www.ti.com/lit/ds/symlink/tmp126.pdf) (49 pp, sha256 `6d9bab59b2814422`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tmp126ndckr-datasheet.pdf)