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TMC2262

Analog Devices · 65 V, 4 A RMS (6 A peak) two-phase stepper motor driver with integrated current sensing, step/dir and SPI · 30L FC2QFN (6x6)

The TMC2262 is a single-axis smart stepper motor driver from Analog Devices (Trinamic) with two integrated 65 V H-bridges rated 4 A RMS, 6 A full-scale sine peak and 9 A bridge peak, about 40 mOhm per MOSFET and lossless integrated current sensing, so no sense resistors are needed. It is aimed at NEMA 17, NEMA 23 and even NEMA 24 steppers. Motion comes in on a step and direction interface with up to 256 microsteps; configuration and diagnostics go over SPI (up to 8 MHz).

StealthChop+ (silent voltage-mode chopper with resonance damping), SpreadCycle, StallGuard2 and StallGuard+ sensorless load detection, CoolStep and CoolStep+ current control, µDcStep and the TriCoder sensorless step-loss detection are on chip, alongside an incremental ABN encoder input, a temperature and supply-voltage ADC, an over-voltage output and the RT-OCSI real-time scope outputs. It runs from 4.5 V to 65 V with a 2.3 V to 5.5 V logic supply, in a thermally optimised 6 x 6 mm FC2QFN (TMC2262 data sheet Rev. 0, pages 1, 10 and 15).

Order code TMC2262AFV+ (standard packing (not tape and reel)). Datasheet: TMC2262 65V/4ARMS+ Fully Integrated Smart Stepper Motor Driver, Rev. 0 (02/26) (local copy: docs/tmc2262-datasheet.pdf). Product page: www.analog.com.

Manufacturer and resources

Everything on this page traces back to Analog Devices. Start here for the original documents and design resources.

Resource Link Why you need it
Product page (Analog Devices) open manufacturer authority: lifecycle, documentation, evaluation kit and the Symbols and Footprints downloads
Data sheet TMC2262 Rev. 0 open the source of every pin and specification on this page (copy in docs/)
Package outline 21-100708 Rev A open the drawing the 3D model is built from (copy in docs/)
Land pattern 90-100245 Rev B open the drawing the footprint follows pad for pad (copy in docs/)
TMC2262-EVKIT user guide open ADI evaluation kit for this driver

Ordering variants

Part number Packing Temperature Note Source
TMC2262AFV+ Standard packing (not tape and reel) -40 to +125 C The part this page ships as its MPN. TMC2262 Rev. 0 page 187
TMC2262AFV+T Tape and reel -40 to +125 C Same part on tape and reel ("T" denotes tape-and-reel). TMC2262 Rev. 0 page 187

Both order codes are the same 30L FC2QFN (F306A6F+1F) on the same land pattern, so the symbol, footprint and 3D model fit both. "+" denotes a lead-free, RoHS-compliant package.

Pinout

Source: TMC2262 Rev. 0, Pin Descriptions (pages 16 and 17) and Figure 2 (page 18). Pin 1 is the top-left pad in the top view; the footprint marks it with a filled silkscreen dot and the 3D model with a dimple on the top.

Pin Name Type Group Function Page
1 VS power_in Motor supply Motor supply voltage. Provide filtering capacitance near the pin with the shortest loop to the GND plane and exposed pad. 16
2 OA2 output Coil A Motor coil A output 2. 16
3 GND power_in Ground Ground. Connect to the ground plane. 16
4 OA1 output Coil A Motor coil A output 1. 16
5 VS power_in Motor supply Motor supply voltage (see pin 1). 16
6 VCP passive Charge pump Charge pump voltage. Tie to VS with a 1.0 uF, 10 V capacitor. 16
7 CPO passive Charge pump Charge pump capacitor output. 16
8 CPI passive Charge pump Charge pump capacitor input. Tie to CPO with a 22 nF, 100 V capacitor. 16
9 DIR input Step/Dir Direction input. 17
10 STEP input Step/Dir Step input. 17
11 CLK input Control Clock input. Tie to GND with a short wire for the internal clock, or supply an external clock; an internal clock-fail-over circuit protects against loss of the external clock. 16
12 CSN input SPI SPI chip select input, active low (internal pull-down). 16
13 SCK input SPI SPI serial clock input (internal pull-down). 16
14 SDI input SPI SPI data input (internal pull-down). 16
15 SDO tri_state SPI SPI data output, tri-state (internal pull-down). 16
16 VS power_in Motor supply Motor supply voltage (see pin 1). 16
17 OB1 output Coil B Motor coil B output 1. 16
18 GND power_in Ground Ground. Connect to the ground plane. 16
19 OB2 output Coil B Motor coil B output 2. 16
20 VS power_in Motor supply Motor supply voltage (see pin 1). 16
21 SLEEPN input Control Low-active power-down and reset input. A continuous low puts the device to sleep; after sleep or reset it must be reconfigured (register contents are lost). Hold the bridges disabled with DRV_ENN while reconfiguring; do not use at high motor velocity. If unused, connect to VCC_IO. Internal pull-down. 16
22 DO0 output Diagnostics Configurable output / diagnostics output 0 to the controller; use an external pull-up in open-drain mode. Pulled low during system reset. Can also be an on-chip scope (OCSI) analog output. 16
23 ENCB input Encoder Encoder B-channel input. 16
24 ENCA input Encoder Encoder A-channel input. 16
25 VCC_IO power_in Logic supply Digital I/O supply from an external source (2.3 V to 5.5 V); defines the I/O level and is required for correct output levels. 17
26 VDD power_out Logic supply Output of the internal 1.8 V regulator. Attach 2.2 uF or more ceramic to ground (AGND) near the pin. 16
27 IREF passive Control Analog reference current for current scaling: external resistor to GND (RREF, 12 kOhm in the electrical characteristics). 16
28 ENCN/OVN bidirectional Encoder Encoder N-channel input, or the over-voltage output (active low). 16
29 DO1 output Diagnostics Configurable output / diagnostics output 1; external pull-up in open-drain mode. Can also be an OCSI analog output. 16
30 DRV_ENN input Control Enable input (internal pull-up). Driven high, the power stage is switched off and all motor outputs float. 16
EP GND power_in Ground Exposed die pad: ground of the power stage and internal circuitry. Connect to a GND plane with as many vias as possible for heat transfer. 16

Pin groups

The KiCad, Fusion and Altium symbols group the pins the same way:

  • Motor supply: Four VS pins feed both H-bridges, 4.5 V to 65 V (absolute maximum 70 V). Put filtering capacitance next to each pin with the shortest loop to the ground plane and exposed pad.
  • Ground: GND pins 3 and 18 and the exposed die pad, which is the ground of the power stage and internal circuitry. Give the pad as many vias to the ground plane as possible.
  • Coil A: H-bridge A outputs to one motor coil.
  • Coil B: H-bridge B outputs to the other motor coil.
  • Charge pump: High-side gate supply: 22 nF 100 V from CPI to CPO, 1.0 uF 10 V from VCP to VS.
  • Logic supply: VCC_IO (2.3 V to 5.5 V) sets the digital I/O level; VDD is the internal 1.8 V regulator output and needs 2.2 uF or more to ground.
  • SPI: Configuration and diagnostics, SPI mode with chip select active low, up to 8 MHz SCK; inputs have internal pull-downs.
  • Step/Dir: Motion input: one microstep per STEP edge in the direction set by DIR.
  • Control: DRV_ENN (high disables the power stage), SLEEPN (low puts the part to sleep and resets it), CLK (tie to GND for the internal 16 MHz clock) and IREF (current-scaling reference resistor, 12 kOhm nominal).
  • Diagnostics: Two configurable outputs (open drain with a pull-up, or OCSI analog scope outputs). DO0 is held low during reset.
  • Encoder: Incremental encoder inputs A, B and N. ENCN shares its pin with the active-low over-voltage output OVN.

Key specifications

Parameter Value Source
Motor supply VS 4.5 V to 65 V (absolute maximum 70 V) Rev. 0 pages 1 and 10
Output current 4 A RMS (6 A full-scale sine peak) per H-bridge, 9 A bridge peak, typical at 25 C Rev. 0 page 1
RDS(on) High side 0.040 ohm typ, low side 0.036 ohm typ (full-scale bits 11); 0.08 ohm HS + LS typical Rev. 0 pages 1 and 11
Current sensing Fully integrated lossless current sensing (ICS); full-scale set by RREF on IREF (12 kOhm nominal) Rev. 0 pages 1 and 12
Interfaces Step and direction (up to 256 microsteps, MicroPlyer interpolation); SPI up to 8 MHz; incremental ABN encoder input Rev. 0 pages 1, 13 and 14
Logic supply VCC_IO 2.3 V to 5.5 V; internal 1.8 V VDD regulator Rev. 0 page 10
Clock Internal 16 MHz oscillator (15.3 to 16.7 MHz) or external clock on CLK Rev. 0 pages 12 and 13
Protection Overcurrent (10 A threshold at full-scale 11), VS UVLO 4 V, thermal shutdown 165 C with prewarning, short protection, over-voltage output Rev. 0 pages 11 and 12
Sleep current IVS 10 uA maximum with SLEEPN low Rev. 0 page 10
Operating temperature -40 to +125 C Rev. 0 pages 10 and 187
Thermal theta-JA 23 C/W (four-layer board, 4 W), theta-JC 2.6 C/W Rev. 0 page 15
Package 30L FC2QFN 6 x 6 x 0.75 mm (F306A6F+1F), outline 21-100708, land pattern 90-100245 Rev. 0 page 15

Sourcing

Snapshot 2026-10-13 (single-unit price and stock at that moment; check before ordering).

Distributor Part number Distributor number Price @1 Stock Link
Mouser TMC2262AFV+ 700-TMC2262AFV+ $15.38 460 open
DigiKey TMC2262AFV+ 175-TMC2262AFV+-ND $14.9800 767 open
DigiKey TMC2262AFV+T 175-TMC2262AFV+TTR-ND $10.2564 0 open

Not stocked by LCSC / JLCPCB: no listing found on 2026-10-13.

Packaging, handling and marking

  • TMC2262AFV+ and TMC2262AFV+T (tape and reel); + marks a lead-free, RoHS-compliant package (Rev. 0 page 187).
  • Top marking: ADI logo, part number (TMC + 2262), test flow and suffix, YYWW date code, assembly and fab code, and the lead-free + near pin 1 (Rev. 0 Figure 1 and Table 1, page 15).
  • Absolute maximum: VS 70 V, VCC_IO 5.5 V, junction 160 C, reflow 260 C (Rev. 0 page 10).
  • theta-JA 23 C/W on a four-layer board with 4 W dissipated: copper area and exposed-pad vias set how much current the part can run continuously (Rev. 0 page 15).

CAD

Adom-authored files are licensed CC-BY-4.0; the manufacturer documents in docs/ keep Analog Devices's terms.

File What it is
tmc2262.kicad_sym KiCad symbol: two columns with intelligent pin groups (Motor supply, Ground, Coil A, Coil B, Charge pump, Logic supply, SPI, Step/Dir, Control, Diagnostics, Encoder) and the outline of this exact chip baked in the body (adom-symbol 1.2.6). MPN, manufacturer, datasheet, Mouser, DigiKey and the Adom Wiki link are symbol properties, so they reach the BOM.
tmc2262.kicad_mod KiCad footprint, pad for pad from the manufacturer land pattern, with heatsink vias in the exposed pad. See Footprint below.
tmc2262.lbr Fusion 360 / EAGLE library (symbol, package, device, with the MPN and distributor attributes).
altium/Adom_tmc2262.SchLib, altium/Adom_tmc2262.PcbLib Native Altium Designer libraries with the 3D body embedded; altium/TMC2262AFV-PLUS.adom-lbr.json is the canonical adom-lbr hub record.
tmc2262-etched.step / .glb Library model (the one the footprint links): the datasheet-built body with a virtual laser-etched TMC2262AFV+ on the top as the toggleable Adom.LaserEtch group.
tmc2262.step / .glb The same body, unmarked.
tmc2262-hero.glb Page hero: the etched chip plus teal dashed copper-pad outlines (50 % opacity), silkscreen with pin 1 (30 %), pad signal labels (50 %) and the heatsink vias through a 1.6 mm board. The chip, the laser etch and the vias switch on and off in the viewer's Layers panel. Reference artwork only: never put it on a board.
viewers/ Self-contained interactive symbol and footprint viewers (adom-symbol embed, adom-footprint embed).
artwork/ Chip-outline cache from adom-chip-thumbnailer (vector outlines with the part number, shaded iso, mark plan and legibility check); TMC2262AFV-PLUS-thumbs.json is the manifest.
provenance/ How every file was made: model dimensions and source drawing, etch plan, hero build, the pad-by-pad footprint comparison, EDA-lane notes, file hashes and the build scripts.

3D models

No manufacturer 3D model was downloadable without a SamacSys or Ultra Librarian account, so the model is built from the ADI package outline 21-100708 Rev A with CadQuery at nominal dimensions: body 6.00 x 6.00 x 0.75 mm, 0.203 mm lead frame, ten 0.54 x 1.95 mm side bars, sixteen 0.25 x 0.40 mm leads, four L-shaped corner terminals (b1 0.40, L1 0.65, L2 0.675), the 1.40 x 4.00 mm exposed pad with its C0.200 pin-1 chamfer, pin-1 dimple on the top. Terminal positions follow the land pattern 90-100245. It is AI-generated from the drawing.

Footprint

From the ADI land pattern 90-100245 Rev B (package outline 21-100708 Rev A), pad for pad: ten 2.275 x 0.590 mm side bars, sixteen 0.300 x 0.725 mm pads, four L-shaped corner pads (pins 6, 15, 21 and 30, drawn as KiCad custom pads with the drawing's R0.150 corner) and the 1.450 x 4.050 mm exposed pad, all inside the 6.600 mm land-pattern extent. The data sheet asks for as many exposed-pad vias as possible; the footprint carries the Adom heatsink rule (10 x 0.3 mm on a 0.7 mm grid, tented: the pitch that fits two columns on the 1.45 mm pad). The paste on the exposed pad is split into four 1.15 x 0.85 mm windows (66 %); ADI gives no stencil, so that is usual practice, not an ADI figure.

TMC2262 model terminals inside the land pattern

Grey: the solderable faces of every terminal, read straight from the STEP. Teal dashed: every copper land of the footprint. Each terminal sits inside its land with the toe and heel the drawing gives, and pad 1 and the exposed-pad chamfer are top left. The full pad-by-pad comparison against the drawing is provenance/footprint-vs-datasheet.json (all lands match).

Fusion 360 and Altium: adom-lbr 2.47.5 cannot carry KiCad custom pads or paste-only windows yet, so the .lbr and the PcbLib draw each L-shaped corner pad as its two legs (two overlapping pads with the same number: identical copper except the R0.150 inner corner) and put paste over the whole exposed pad. Trim the exposed-pad paste in your stencil. Details in provenance/eda-lanes.json.

Thermal pad

The exposed die pad is GND for the power stage and internal circuitry; the data sheet asks for as many vias to the GND plane as possible (Pin Descriptions, page 16). The array shown follows the Adom heatsink-via rule (0.3 mm drill, tented) on a 0.7 mm grid so two columns fit the 1.45 mm pad; it is not an ADI figure; theta-JA 23 C/W assumes a four-layer board (page 15).

Chip outline cache

Provenance

Data Source Reference Evidence
Identity, features Analog Devices TMC2262 Rev. 0 page 1 datasheet copy in docs/
Pin numbers and functions TMC2262 Rev. 0 Pin Descriptions (pages 16 and 17) and Figure 2 (page 18) table above quotes the datasheet, page per pin
Package dimensions ADI package outline 21-100708 Rev A docs/21-100708a.pdf provenance/tmc2262.step.json, proof image above
Land pattern ADI land pattern 90-100245 Rev B docs/90-100245b.pdf provenance/footprint-vs-datasheet.json
3D model built from the package drawing (CadQuery), no manufacturer STEP 2026-10-13 provenance/tmc2262.step.json, models.json
Virtual part number adom-chip-thumbnailer mark planner legibility gate PASS artwork/TMC2262AFV-PLUS-etched.check.png, provenance/tmc2262-etched.step.json
Price and stock Mouser, DigiKey 2026-10-13 Sourcing table above

Cited datasheet pages

Page images rendered from the TMC2262 Rev. 0 copy in docs/ (click to enlarge).

Page What it shows
page 1 Features and simplified block diagram
page 10 Absolute maximum ratings and power supply characteristics
page 11 Output and protection characteristics
page 15 Package information and marking
page 16 Pin descriptions
page 17 Pin descriptions (continued)
page 18 Pin configuration (Figure 2)
page 20 Block diagram with typical external components (Figure 4)
page 187 Ordering information
21-100708 Rev A Package outline, 30L FC2QFN 6 x 6 x 0.75 mm
90-100245 Rev B Recommended land pattern and package overlay

Talk to the AI

Paste one of these into an Adom AI thread:

  • "Add the TMC2262 from the Adom wiki to my KiCad project and place it on the schematic."
  • "Send the TMC2262 Fusion 360 library from the wiki to my desktop and open it."
  • "Install the TMC2262 Altium library from adom/tmc2262 into my Altium project."
  • "Lay out a TMC2262 stepper stage for a NEMA 17 at 24 V with the charge pump, VDD and IREF parts from the data sheet."
  • TMC2240ATJ+T - the smaller 36 V, 2 A RMS sibling with SPI/UART and step/dir in a TQFN-32 5 x 5 mm.

License

Adom-authored symbol, footprint, 3D models, artwork and scripts: CC-BY-4.0 (LICENSE). The datasheets and package drawings in docs/ are copyright Analog Devices and included for reference.

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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