component
TM9926A
Public Made by Adomby adom
Tritech MOS MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TM9926A
Tritech MOS · MOSFETs · SOP-8
TM9926A from Tritech MOS, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (N-channel), drain-source rated 20V with 8.0A continuous drain current at TA=25C. |
| 2 | G1 | input | Gate of MOSFET 1, rated for gate-source voltage of ±12V with threshold of 0.4V to 1.0V at 250uA. |
| 3 | S2 | passive | Source of MOSFET 2 (N-channel), drain-source rated 20V with 8.0A continuous drain current at TA=25C. |
| 4 | G2 | input | Gate of MOSFET 2, rated for gate-source voltage of ±12V with threshold of 0.4V to 1.0V at 250uA. |
| 5 | D2 | passive | Drain of MOSFET 2, rated for 20V drain-source voltage and 25A pulsed drain current (pins 5 and 6 are both D2). |
| 6 | D2 | passive | Drain of MOSFET 2, rated for 20V drain-source voltage and 25A pulsed drain current (pins 5 and 6 are both D2). |
| 7 | D1 | passive | Drain of MOSFET 1, rated for 20V drain-source voltage and 25A pulsed drain current (pins 7 and 8 are both D1). |
| 8 | D1 | passive | Drain of MOSFET 1, rated for 20V drain-source voltage and 25A pulsed drain current (pins 7 and 8 are both D1). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tritech MOS |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 20 | V | 1 | |||
| Gate-Source Voltage | VGS | -12 | 12 | V | 1 | ||
| Continuous Drain Current | ID@TA=25℃ | 8 | A | VGS @ 4.5V | 1 | ||
| Continuous Drain Current | ID@TA=70℃ | 4.8 | A | VGS @ 4.5V | 1 | ||
| Pulsed Drain Current | IDM | 25 | A | 1 | |||
| Total Power Dissipation | PD@TA=25℃ | 1.65 | W | 1 | |||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance Junction-ambient | RθJA | 78 | ℃/W | 1 | |||
| Drain-Source Breakdown Voltage | V(BR)DSS | 20 | V | VGS=0V, ID=250μA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | μA | VDS=20V, VGS=0V | 2 | ||
| Gate to Body Leakage Current | IGSS | -100 | 100 | nA | VDS=0V, VGS =±12V | 2 | |
| Gate Threshold Voltage | VGS(th) | 0.4 | 0.7 | 1 | V | VDS=VGS, ID=250μA | 2 |
| Static Drain-Source on-Resistance | RDS(on) | 20 | 28 | mΩ | VGS=4.5V, ID=6A | 2 | |
| Static Drain-Source on-Resistance | RDS(on) | 25.5 | 38 | mΩ | VGS=2.5V, ID=5A | 2 | |
| Maximum Continuous Drain to Source Diode Forward Current | IS | 8 | A | 2 | |||
| Maximum Pulsed Drain to Source Diode Forward Current | ISM | 24 | A | 2 | |||
| Drain to Source Diode Forward Voltage | VSD | 1.2 | V | VGS=0V, IS=6A | 2 |
CAD (KiCad official)
- Symbol:
TM9926A - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
tm9926a-etched.step/tm9926a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tm9926a.step/tm9926a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Tritech MOS datasheet (5 pp, sha256
ddb75120b4d241ed, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TM9926A
**Tritech MOS** · MOSFETs · SOP-8
TM9926A from Tritech MOS, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (N-channel), drain-source rated 20V with 8.0A continuous drain current at TA=25C. |
| 2 | G1 | input | Gate of MOSFET 1, rated for gate-source voltage of ±12V with threshold of 0.4V to 1.0V at 250uA. |
| 3 | S2 | passive | Source of MOSFET 2 (N-channel), drain-source rated 20V with 8.0A continuous drain current at TA=25C. |
| 4 | G2 | input | Gate of MOSFET 2, rated for gate-source voltage of ±12V with threshold of 0.4V to 1.0V at 250uA. |
| 5 | D2 | passive | Drain of MOSFET 2, rated for 20V drain-source voltage and 25A pulsed drain current (pins 5 and 6 are both D2). |
| 6 | D2 | passive | Drain of MOSFET 2, rated for 20V drain-source voltage and 25A pulsed drain current (pins 5 and 6 are both D2). |
| 7 | D1 | passive | Drain of MOSFET 1, rated for 20V drain-source voltage and 25A pulsed drain current (pins 7 and 8 are both D1). |
| 8 | D1 | passive | Drain of MOSFET 1, rated for 20V drain-source voltage and 25A pulsed drain current (pins 7 and 8 are both D1). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tritech MOS |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 20 | V | | 1 |
| Gate-Source Voltage | VGS | -12 | | 12 | V | | 1 |
| Continuous Drain Current | ID@TA=25℃ | | | 8 | A | VGS @ 4.5V | 1 |
| Continuous Drain Current | ID@TA=70℃ | | | 4.8 | A | VGS @ 4.5V | 1 |
| Pulsed Drain Current | IDM | | | 25 | A | | 1 |
| Total Power Dissipation | PD@TA=25℃ | | | 1.65 | W | | 1 |
| Storage Temperature Range | TSTG | -55 | | 150 | ℃ | | 1 |
| Operating Junction Temperature Range | TJ | -55 | | 150 | ℃ | | 1 |
| Thermal Resistance Junction-ambient | RθJA | | | 78 | ℃/W | | 1 |
| Drain-Source Breakdown Voltage | V(BR)DSS | 20 | | | V | VGS=0V, ID=250μA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | μA | VDS=20V, VGS=0V | 2 |
| Gate to Body Leakage Current | IGSS | -100 | | 100 | nA | VDS=0V, VGS =±12V | 2 |
| Gate Threshold Voltage | VGS(th) | 0.4 | 0.7 | 1 | V | VDS=VGS, ID=250μA | 2 |
| Static Drain-Source on-Resistance | RDS(on) | | 20 | 28 | mΩ | VGS=4.5V, ID=6A | 2 |
| Static Drain-Source on-Resistance | RDS(on) | | 25.5 | 38 | mΩ | VGS=2.5V, ID=5A | 2 |
| Maximum Continuous Drain to Source Diode Forward Current | IS | | | 8 | A | | 2 |
| Maximum Pulsed Drain to Source Diode Forward Current | ISM | | | 24 | A | | 2 |
| Drain to Source Diode Forward Voltage | VSD | | | 1.2 | V | VGS=0V, IS=6A | 2 |
## CAD (KiCad official)
- Symbol: `TM9926A`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `tm9926a-etched.step` / `tm9926a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tm9926a.step` / `tm9926a.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Tritech MOS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590906742358155264) (5 pp, sha256 `ddb75120b4d241ed`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tm9926a-datasheet.pdf)