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Contents

README

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TLV9101IDBVR

Texas Instruments · Operational Amplifier · SOT-23-5

TLV9101IDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Amplifier output. Rail-to-rail output stage capable of sourcing/sinking ±80mA (typical) with 4.5V/µs slew rate.
2 V- power_in Negative (lowest) supply rail. Connect to ground for single-supply operation, or to the negative supply for split-supply operation. Total supply range 2.7V to 16V (±1.35V to ±8V).
3 IN+ input Non-inverting input. Rail-to-rail input range (extends to both supply rails).
4 IN- input Inverting input. Rail-to-rail input range (extends to both supply rails).
5 V+ power_in Positive (highest) supply rail. Total supply range 2.7V to 16V (±1.35V to ±8V). Quiescent current 120µA typical per amplifier.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Op-amp/Cmp
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TLV9101IDBVR
  • TLV9101IDBVRDCK
  • TLV9101IDBVRDRL
  • TLV9101IDBVRS-DBV

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (VCM = V–) VOS 0.3 1.5 mV VCM = V– 12
Input offset voltage over temperature VOS 1.75 mV TA = –40°C 至 125°C 12
Input offset voltage vs power supply (PSRR) PSRR 0.1 0.7 µV/V VCM = V–, TA = –40°C 至 125°C 12
Common-mode rejection ratio, VS = 16V CMRR 90 110 dB VS = 16V,(V–) – 0.1V < VCM < (V+) – 2V(主输入对),TA = –40°C 至 125°C 12
Common-mode rejection ratio, VS = 4V CMRR 75 95 dB VS = 4V,(V–) – 0.1V < VCM < (V+) – 2V(主输入对) 12
Common-mode voltage range (printed as (V–)−0.2 to (V+)+0.2) VCM -0.2 0.2 V min referenced to (V–), max referenced to (V+) 12
Open-loop voltage gain, VS = 16V AOL 115 135 dB VS = 16V,VCM = V–,(V–) + 0.1V < VO < (V+) – 0.1V,TA = –40°C 至 125°C 13
Open-loop voltage gain, VS = 4V AOL 104 125 dB VS = 4V,VCM = V–,(V–) + 0.1V < VO < (V+) – 0.1V 13
Output voltage swing from supply rail, RL = 10kΩ VO 45 60 mV VS = 16V,RL = 10kΩ,正负电源轨裕度 13
Output voltage swing from supply rail, RL = 2kΩ VO 200 300 mV VS = 16V,RL = 2kΩ,正负电源轨裕度 13
Output voltage swing from supply rail, RL = 10kΩ VO 5 20 mV VS = 2.7V,RL = 10kΩ,正负电源轨裕度 13
Output voltage swing from supply rail, RL = 2kΩ VO 25 50 mV VS = 2.7V,RL = 2kΩ,正负电源轨裕度 13
Quiescent current per amplifier IQ 115 150 µA IO = 0A 13
Quiescent current per amplifier over temperature IQ 160 µA IO = 0A,TA = –40°C 至 125°C 13
Quiescent current, all amplifiers disabled IQSD 20 30 µA VS = 2.7V 至 16V,所有放大器均为禁用状态,SHDN = V+ 14
Supply voltage range VS 2.7 16 V VS = (V+) – (V–),single supply (±1.35V 至 ±8V) 12
Operating temperature range TA -40 125 °C 额定工作温度范围 1
Junction-to-ambient thermal resistance (5-pin DBV) RθJA 192.2 °C/W DBV (SOT-23) 5-pin package, TLV9101 11
Junction-to-case (top) thermal resistance (5-pin DBV) RθJC(top) 113.7 °C/W DBV (SOT-23) 5-pin package, TLV9101 11
Junction-to-board thermal resistance (5-pin DBV) RθJB 60.6 °C/W DBV (SOT-23) 5-pin package, TLV9101 11
Junction-to-top characterization parameter (5-pin DBV) ψJT 37.4 °C/W DBV (SOT-23) 5-pin package, TLV9101 11
Junction-to-board characterization parameter (5-pin DBV) ψJB 60.4 °C/W DBV (SOT-23) 5-pin package, TLV9101 11

CAD (KiCad official)

  • Symbol: TLV9101IDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv9101idbvr-etched.step / tlv9101idbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv9101idbvr.step / tlv9101idbvr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tlv9101idbvr.step 85 KB You want the bare part, or you mark your own boards.
tlv9101idbvr-etched.step 1.8 MB You want the part with TLV9101IDBVR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 463 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (83 pp, sha256 af3c8f7642951119, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF