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TLV888DR

Public Made by Adom

by adom

Texas Instruments , SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV888DR

Texas Instruments · IC · SOIC-8

TLV888DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connection; can be left floating.
2 -IN input Inverting input of the amplifier.
3 +IN input Noninverting input of the amplifier.
4 V- power_in Negative (lowest) power supply.
5 NC unconnected No connection; can be left floating.
6 OUT output Amplifier output.
7 V+ power_in Positive (highest) power supply; single-supply range is 4.5V to 36V total across V+ and V-.
8 NC unconnected No connection; can be left floating.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VOS -15 3 15 µV TA = 25°C, VS = 4.5V to 36V 8
Input offset voltage over temperature VOS -20 20 µV TA = -40°C to +125°C 8
Input offset voltage drift dVOS/dT -0.05 0.01 0.05 µV/°C TA = -40°C to +125°C 8
Power-supply rejection ratio PSRR -0.5 0.03 0.5 µV/V TA = -40°C to +125°C 8
Input bias current IB -350 50 350 pA TA = 25°C 8
Input bias current over temperature IB -7 7 nA TA = -40°C to +125°C 8
Input offset current IOS -600 100 600 pA TA = 25°C 8
Input offset current over temperature IOS -3 3 nA TA = -40°C to +125°C 8
Common-mode rejection ratio CMRR 118 135 dB (V-), 0.1V ≤ VCM ≤ (V+), 1.7V, VS = ±2.25V 8
Common-mode rejection ratio CMRR 140 150 dB (V-), 0.1V ≤ VCM ≤ (V+), 1.7V, VS = ±18V 8
Common-mode rejection ratio over temperature CMRR 118 130 dB TA = -40°C to +125°C, VS = ±2.25V 8
Common-mode rejection ratio over temperature CMRR 140 150 dB TA = -40°C to +125°C, VS = ±18V 8
Open-loop voltage gain AOL 130 148 dB VS = ±15V, (V-) + 0.6V < VO < (V+), 0.6V, RLOAD = 10kΩ 8
Open-loop voltage gain over temperature AOL 130 dB TA = -40°C to +125°C, RLOAD = 10kΩ 8
Open-loop voltage gain AOL 130 144 dB VS = ±15V, (V-) + 1.7V < VO < (V+), 1.7V, RLOAD = 2kΩ 8
Output swing from positive rail, no load VO 26 40 mV Positive rail, VS = 30V, no load 9
Output swing from positive rail VO 122 150 mV Positive rail, VS = 30V, RLOAD = 10kΩ 9
Output swing from positive rail VO 500 575 mV Positive rail, VS = 30V, RLOAD = 2kΩ 9
Output swing from negative rail, no load VO 26 40 mV Negative rail, VS = 30V, no load 9
Output swing from negative rail VO 120 135 mV Negative rail, VS = 30V, RLOAD = 10kΩ 9
Output swing from negative rail VO 515 575 mV Negative rail, VS = 30V, RLOAD = 2kΩ 9
Output swing from rail over temperature VO 250 mV RLOAD = 10kΩ, TA = -40°C to +125°C, both rails 9
Quiescent current per amplifier IQ 1.5 1.8 mA VS = ±2.25V (VS = 4.5V), IO = 0A 9
Quiescent current per amplifier over temperature IQ 1.5 1.9 mA VS = ±2.25V (VS = 4.5V), IO = 0A, TA = -40°C to +125°C 9
Common-mode voltage range VCM -0.1 -1.7 V Printed as (V-), 0.1 to (V+), 1.7; min is relative to V-, max relative to V+ 8
Supply voltage, single supply VS 4.5 36 V (V+), (V-) 6
Supply voltage, dual supply VS -2.25 18 V Printed ±2.25 to ±18 6
Operating temperature TA -40 125 °C 6
Supply voltage VS 40 V 6
Signal input pin current -10 10 mA Signal input pins 6
Operating temperature TA -55 150 °C 6
Junction temperature TJ 150 °C 6
Storage temperature Tstg -65 150 °C 6
ESD HBM V(ESD) -4000 4000 V Human-body model, ANSI/ESDA/JEDEC JS-001 6
ESD CDM V(ESD) -250 250 V Charged-device model, JS-002, TLV888D 6
Junction-to-ambient thermal resistance RθJA 144.1 °C/W D (SOIC), 8 pins 7
Junction-to-case (top) thermal resistance RθJC(top) 81.9 °C/W D (SOIC), 8 pins 7
Junction-to-board thermal resistance RθJB 88.9 °C/W D (SOIC), 8 pins 7
Junction-to-top characterization parameter ΨJT 26.2 °C/W D (SOIC), 8 pins 7
Junction-to-board characterization parameter ΨJB 88.3 °C/W D (SOIC), 8 pins 7
Input voltage noise En 0.18 µVPP f = 0.1Hz to 10Hz 8
Input voltage noise density en 7.5 nV/√Hz f = 1kHz 8
Input current noise density in 175 fA/√Hz f = 1kHz 8
Gain-bandwidth product GBW 14 MHz 9
Slew rate SR 40 V/µs Gain = 1, 10V step 9
Short-circuit current ISC 42 mA Printed ±42 9
Open-loop output impedance ZO 220 Ω f = 1MHz 9

CAD (KiCad official)

  • Symbol: TLV888DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tlv888dr-etched.step / tlv888dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv888dr.step / tlv888dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (55 pp, sha256 cfad4277ce2e96a3, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF