component

TLV75509PDRVR

Public Made by Adom

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tlv75509pdrvrfactory-2.0.0extractor-text

Verified TLV75509PDRVR

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 7 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLV75509PDRVR · WSON-6-EP(2x2) · 7 pins
  • ✓copper: 7 copper pads, none touching another net
  • ✓datasheet: all 7 pin names found in the 51-page datasheet
  • ✓distributor: lcsc C2861630, digikey 296-51780-2-ND, mouser 595-TLV75509PDRVR
  • ✓family: WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-cop7_l00/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 7 pins = 7 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 7 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tlv75509pdrvr.kicad_sym✓ tlv75509pdrvr.kicad_mod✓ tlv75509pdrvr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 19h ago
viewers tlv75509pdrvr: viewers · Ray 19h ago
package.json Publish 0.1.0 · Ray 19h ago
page.json Set visibility: public · Ray 19h ago
README.md Publish 0.1.0 · Ray 19h ago
tlv75509pdrvr-etched.glb Publish 0.1.0 · Ray 19h ago
tlv75509pdrvr-etched.step tlv75509pdrvr: factory component page (tier=mfr) · Ray 19h ago
tlv75509pdrvr-hero.glb tlv75509pdrvr: hero GLB from the etched model (keeps the MPN mark) · Ray 19h ago
tlv75509pdrvr-hero.overlay.json Publish 0.1.0 · Ray 19h ago
tlv75509pdrvr.glb Publish 0.1.0 · Ray 19h ago
tlv75509pdrvr.kicad_mod Publish 0.1.0 · Ray 19h ago
tlv75509pdrvr.kicad_sym Publish 0.1.0 · Ray 19h ago
tlv75509pdrvr.lbr Publish 0.1.0 · Ray 19h ago
tlv75509pdrvr.step Publish 0.1.0 · Ray 19h ago
verification.json Verified: Published by the parts factory: tier mfr, 7 pins · Ray 19h ago

TLV75509PDRVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)

TLV75509PDRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Regulated output voltage pin that requires a capacitor of 1µF or larger to ground, with nominal input and output capacitance greater than 0.47µF after 50% derating.
2 NC unconnected No internal connection.
3 GND power_in Ground pin, internally connected to the thermal pad.
4 EN input Enable pin: drive greater than VHI to turn on the regulator and less than VLO to place the LDO into shutdown mode.
5 NC unconnected No internal connection.
6 IN power_in Input pin that requires a capacitor of 1µF or larger to ground; the input voltage range is 1.45V to 5.5V.
7 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN 1.45 5.5 V 4
Output voltage VOUT 0.6 5 V 4
Enable voltage VEN 0 5.5 V 4
Output current IOUT 0 500 mA 4
Input capacitor CIN 1 μF 4
Output capacitor COUT 1 200 μF 4
Enable toggle frequency fEN 10 kHz 4
Junction temperature TJ -40 125 °C 4
Supply voltage VIN -0.3 6 V 4
Enable voltage VEN -0.3 6 V 4
Output voltage VOUT -0.3 V max VIN + 0.3 V or 6.0 V, whichever is smaller 4
Operating junction temperature TJ -40 150 °C 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance (JEDEC, DRV) RθJA 100.2 °C/W JEDEC PCB, DRV (WSON, 6 pins) 5
Junction-to-case (top) thermal resistance (JEDEC, DRV) RθJC(top) 108.5 °C/W JEDEC PCB, DRV (WSON, 6 pins) 5
Junction-to-board thermal resistance (JEDEC, DRV) RθJB 64.3 °C/W JEDEC PCB, DRV (WSON, 6 pins) 5
Junction-to-top characterization parameter (JEDEC, DRV) ψJT 10.4 °C/W JEDEC PCB, DRV (WSON, 6 pins) 5
Junction-to-board characterization parameter (JEDEC, DRV) ψJB 64.8 °C/W JEDEC PCB, DRV (WSON, 6 pins) 5
Junction-to-case (bottom) thermal resistance (JEDEC, DRV) RθJC(bot) 34.7 °C/W JEDEC PCB, DRV (WSON, 6 pins) 5
Output accuracy VOUT -1 1 % −40°C ≤ TJ ≤ +85°C, DBV and DRV package 5
Output accuracy VOUT -10 10 mV −40°C ≤ TJ ≤ +85°C; 0.6V ≤ VOUT < 1.0V 5
Output accuracy VOUT -15 15 mV 0.6V ≤ VOUT < 1V 5
Ground current IGND 14 25 µA TJ = 25°C, IOUT = 0mA 5
Ground current IGND 33 µA −40°C ≤ TJ ≤ +85°C, IOUT = 0mA 5
Ground current IGND 40 µA −40°C ≤ TJ ≤ +125°C, IOUT = 0mA 5
Shutdown current ISHDN 0.1 1 µA VEN ≤ 0.4V, 1.4V ≤ VIN ≤ 5.5V, −40°C ≤ TJ ≤ +125°C 5
Output current limit ICL 560 720 865 mA VIN = VOUT+ VDO(MAX) + 0.25V; VOUT = VOUT - 0.2V, VOUT ≤ 1.5V 5
Short-circuit current limit ISC 355 mA VOUT = 0V 5
Dropout voltage VDO 600 930 mV IOUT = 500mA, −40°C ≤ TJ ≤ +85°C, 0.8 V ≤ VOUT < 1.0V 6
Dropout voltage VDO 985 mV IOUT = 500mA, −40°C ≤ TJ ≤ +125°C, 0.8V ≤ VOUT < 1.0V 6
Power-supply rejection ratio PSRR 52 dB f = 1kHz, VIN = VOUT + 1V, IOUT = 50mA 6
Power-supply rejection ratio PSRR 46 dB f = 100kHz, VIN = VOUT + 1V, IOUT = 50mA 6
Output noise voltage VN 71.5 µVRMS BW = 10Hz to 100kHz; VOUT = 1.2V, IOUT = 50 mA 6
Undervoltage lockout VUVLO 1.21 1.3 1.44 V VIN rising 6
Undervoltage lockout hysteresis VUVLO,HYST 40 mV VIN falling 6
Startup time tSTR 550 µs 6
EN pin high voltage (enabled) VHI 1 V enabled 6
EN pin low voltage (enabled) VLO 0.3 V enabled 6
Enable pin current IEN 10 nA EN = 5.5V 6
Thermal shutdown TSD 165 °C Shutdown, temperature increasing 6
Thermal shutdown reset TSD 155 °C Reset, temperature decreasing 6
Pulldown resistance RPULLDOWN 120 Ω VIN = 5.5V 6

CAD (KiCad official)

  • Symbol: TLV75509PDRVR
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: tlv75509pdrvr-etched.step / tlv75509pdrvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv75509pdrvr.step / tlv75509pdrvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 c1153fc652d345a9, retrieved 2026-11-06, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF