TLV702475DBVR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownTLV702475DBVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TLV702475DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Unregulated input supply pin, 2 V to 5.5 V (6 V abs max). A small 1-µF ceramic capacitor from IN to GND is recommended for stability and good transient performance. |
| 2 | GND | power_in | Device ground reference. All voltages are referenced to this node. |
| 3 | EN | input | Enable input. Driving EN above 0.9 V turns the regulator on; driving EN below 0.4 V puts it in shutdown (~1 µA IQ). Absolute max is VIN + 0.3 V or 6.0 V (whichever is smaller). Enable current is ~0.04 µA at VEN=5.5 V. For TLV702P, OUT is discharged through an internal 120-Ω resistor when disabled. |
| 4 | NC | unconnected | No internal connection. May be tied to GND to improve thermal dissipation. |
| 5 | OUT | power_out | Regulated 4.75-V output pin (fixed for the '475' option), up to 300 mA. A 1-µF ceramic capacitor from OUT to GND is required for stability. Internally current-limited (typ 500 mA, min 320 mA). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
TLV702475DBVRTLV702475DBVRDBVTTLV702475DBVRDSERTLV702475DBVRDSET
CAD (KiCad official)
- Symbol:
TLV702475DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tlv702475dbvr-etched.step/tlv702475dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv702475dbvr.step/tlv702475dbvr.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tlv702475dbvr.step |
85 KB | You want the bare part, or you mark your own boards. |
tlv702475dbvr-etched.step |
1.9 MB | You want the part with TLV702475DBVR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 489 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
5a8afc4236a17ab4, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).