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TLV5632IDWR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DACs), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLV5632IDWR
Texas Instruments · Digital To Analog Converters (DACs) · SOIC-20-300mil
TLV5632IDWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DGND | power_in | Digital ground reference for the serial interface and digital logic. |
| 2 | DIN | input | Digital serial data input that receives the 16-bit word (4 control bits and 12 data bits) MSB first on falling SCLK edges. |
| 3 | SCLK | input | Serial clock input whose maximum frequency is 30 MHz, with a minimum high and low pulse of 16 ns each. |
| 4 | FS | input | Frame sync input whose falling edge starts a write cycle; in µC mode it must stay low until all 16 data bits are transferred. |
| 5 | PRE | input | Asynchronous preset input that, when driven low together with LDAC asserted, loads all DAC outputs from the preset register. |
| 6 | OUTE | output | DAC E analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 7 | OUTF | output | DAC F analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 8 | OUTG | output | DAC G analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 9 | OUTH | output | DAC H analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 10 | AGND | power_in | Analog ground reference for the DAC core, output buffers and reference. |
| 11 | AVDD | power_in | Analog power supply, 4.5 V to 5.5 V for 5-V operation or 2.7 V to 3.3 V for 3-V operation, and it must power up before DVDD for correct power-on reset. |
| 12 | OUTA | output | DAC A analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 13 | OUTB | output | DAC B analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 14 | OUTC | output | DAC C analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 15 | OUTD | output | DAC D analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 16 | REF | bidirectional | Reference input/output that accepts an external reference from 0 to AVDD or sources an internal 1.024 V or 2.048 V reference (up to 1 mA), which needs a 1 µF to 10 µF capacitor in parallel with 100 pF when internal reference is used. |
| 17 | MODE | input | DSP/µC mode select where high selects µC mode and not connected (or 0) selects DSP mode. |
| 18 | LDAC | input | Asynchronous load DAC input; DAC outputs update only while LDAC is low, with a minimum low pulse of 10 ns. |
| 19 | DOUT | output | Digital serial data output that repeats DIN data with a 16-clock delay for daisy-chaining when enabled through CTRL0. |
| 20 | DVDD | power_in | Digital power supply, 4.5 V to 5.5 V for 5-V operation or 2.7 V to 3.3 V for 3-V operation, and it must come up after AVDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | ADC/DAC/Data Conversion |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
TLV5632IDWR - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
tlv5632idwr-etched.step/tlv5632idwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv5632idwr.step/tlv5632idwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
fca921911e680eae, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLV5632IDWR
**Texas Instruments** · Digital To Analog Converters (DACs) · SOIC-20-300mil
TLV5632IDWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DGND | power_in | Digital ground reference for the serial interface and digital logic. |
| 2 | DIN | input | Digital serial data input that receives the 16-bit word (4 control bits and 12 data bits) MSB first on falling SCLK edges. |
| 3 | SCLK | input | Serial clock input whose maximum frequency is 30 MHz, with a minimum high and low pulse of 16 ns each. |
| 4 | FS | input | Frame sync input whose falling edge starts a write cycle; in µC mode it must stay low until all 16 data bits are transferred. |
| 5 | PRE | input | Asynchronous preset input that, when driven low together with LDAC asserted, loads all DAC outputs from the preset register. |
| 6 | OUTE | output | DAC E analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 7 | OUTF | output | DAC F analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 8 | OUTG | output | DAC G analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 9 | OUTH | output | DAC H analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 10 | AGND | power_in | Analog ground reference for the DAC core, output buffers and reference. |
| 11 | AVDD | power_in | Analog power supply, 4.5 V to 5.5 V for 5-V operation or 2.7 V to 3.3 V for 3-V operation, and it must power up before DVDD for correct power-on reset. |
| 12 | OUTA | output | DAC A analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 13 | OUTB | output | DAC B analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 14 | OUTC | output | DAC C analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 15 | OUTD | output | DAC D analog voltage output, rail-to-rail and short-circuit protected, with a specified range of 0 to AVDD − 0.4 V at RL = 10 kΩ. |
| 16 | REF | bidirectional | Reference input/output that accepts an external reference from 0 to AVDD or sources an internal 1.024 V or 2.048 V reference (up to 1 mA), which needs a 1 µF to 10 µF capacitor in parallel with 100 pF when internal reference is used. |
| 17 | MODE | input | DSP/µC mode select where high selects µC mode and not connected (or 0) selects DSP mode. |
| 18 | LDAC | input | Asynchronous load DAC input; DAC outputs update only while LDAC is low, with a minimum low pulse of 10 ns. |
| 19 | DOUT | output | Digital serial data output that repeats DIN data with a 16-clock delay for daisy-chaining when enabled through CTRL0. |
| 20 | DVDD | power_in | Digital power supply, 4.5 V to 5.5 V for 5-V operation or 2.7 V to 3.3 V for 3-V operation, and it must come up after AVDD. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | ADC/DAC/Data Conversion |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `TLV5632IDWR`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `tlv5632idwr-etched.step` / `tlv5632idwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv5632idwr.step` / `tlv5632idwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv5630) (25 pp, sha256 `fca921911e680eae`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlv5632idwr-datasheet.pdf)