component
TLV5627IPWR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"digikey": "TLV5627IPWR-ND",
"mouser": "595-TLV5627IPWR"
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{
"number": "1",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply for the serial interface, which can be any value from 2.7 V to 5.5 V independent of AVDD, with the AVDD to DVDD difference limited to ±2.8 V."
},
{
"number": "2",
"name": "PD",
"type": "input",
"description": "Active-low power-down pin that powers down all DACs (overriding their individual power-down settings) and all output stages, with digital input voltage limited to −0.3 V to DVDD + 0.3 V."
},
{
"number": "3",
"name": "LDAC",
"type": "input",
"description": "Load DAC: when high, no DAC output updates occur as input data is read into the serial interface, and the DAC outputs are updated only when LDAC is low."
},
{
"number": "4",
"name": "DIN",
"type": "input",
"description": "Serial data input for the 16-bit data word (DAC address, control bits and 8-bit DAC value), with digital input voltage limited to −0.3 V to DVDD + 0.3 V."
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{
"number": "5",
"name": "SCLK",
"type": "input",
"description": "Serial clock input, with a maximum serial clock rate of 20 MHz."
},
{
"number": "6",
"name": "CS",
"type": "input",
"description": "Chip select input, active low; the device is enabled for the serial interface only when CS is low."
},
{
"number": "7",
"name": "FS",
"type": "input",
"description": "Frame sync input; the falling edge of the frame sync pulse indicates the start of a serial data frame shifted into the TLV5627."
},
{
"number": "8",
"name": "DGND",
"type": "power_in",
"description": "Digital ground for the serial interface supply DVDD."
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{
"number": "9",
"name": "AGND",
"type": "power_in",
"description": "Analog ground for the DACs, reference buffers and output buffers."
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{
"number": "10",
"name": "REFINCD",
"type": "input",
"description": "Voltage reference input for DACs C and D, with input voltage range 0 to AVDD−1.5 V (voltages above AVDD/2 cause output saturation at large codes)."
},
{
"number": "11",
"name": "OUTD",
"type": "output",
"description": "DAC D analog output, which swings from 0 to AVDD−0.4 V with a 10 kΩ load."
},
{
"number": "12",
"name": "OUTC",
"type": "output",
"description": "DAC C analog output, which swings from 0 to AVDD−0.4 V with a 10 kΩ load."
},
{
"number": "13",
"name": "OUTB",
"type": "output",
"description": "DAC B analog output, which swings from 0 to AVDD−0.4 V with a 10 kΩ load."
},
{
"number": "14",
"name": "OUTA",
"type": "output",
"description": "DAC A analog output, which swings from 0 to AVDD−0.4 V with a 10 kΩ load."
},
{
"number": "15",
"name": "REFINAB",
"type": "input",
"description": "Voltage reference input for DACs A and B, with input voltage range 0 to AVDD−1.5 V (voltages above AVDD/2 cause output saturation at large codes)."
},
{
"number": "16",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply for the DACs, reference buffers and output buffers, which can be any value from 2.7 V to 5.5 V."
}
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"guards": "pin_guards 0.1: passed",
"guard_notes": [
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"pages_sent": 24,
"cost_usd": 0.089,
"at": "2026-10-10T19:59:16"
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"url": "https://www.ti.com/cn/lit/gpn/tlv5627",
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"sha256": "872ad78ca749d1ea",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
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"described": 16,
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"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "TSSOP-16",
"Category": "Data Acquisition",
"Pins": "16"
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