component
TLV2548QDW
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"mpn": "TLV2548QDW",
"manufacturer": "Texas Instruments",
"package": "SOIC-20-300mil",
"pin_count": 20,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
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"digikey": "2156-TLV2548QDW-ND",
"mouser": "595-TLV2548QDW"
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{
"number": "1",
"name": "SDO",
"type": "tri_state",
"description": "The 3-state serial output carries the A/D conversion result MSB (D15) first and stays high-impedance while CS is high and until the MSB is presented."
},
{
"number": "2",
"name": "SDI",
"type": "input",
"description": "Serial data input takes the MSB (D15) first, with the 4-bit command in D(15-12) and up to 12 bits of configuration data, latched on SCLK rising edges after CS falls (or falling edges when FS is used)."
},
{
"number": "3",
"name": "SCLK",
"type": "input",
"description": "Input serial clock from the host clocks SDI into the input register and may serve as the conversion clock source; the device supports CPOL = 0 and SCLK up to 20 MHz."
},
{
"number": "4",
"name": "EOC/(INT)",
"type": "output",
"description": "Programmed as EOC, it goes low at the end of the sampling period until conversion data are ready (conversion mode 00 only); programmed as INT, its falling edge indicates data ready and is cleared by the following CS↓ or FS."
},
{
"number": "5",
"name": "VCC",
"type": "power_in",
"description": "Positive supply voltage; the device operates from a single 3-V to 5.5-V supply."
},
{
"number": "6",
"name": "A0",
"type": "input",
"description": "Analog signal input multiplexed internally; the driving source impedance should be less than or equal to 1 kΩ, otherwise use CSTART or long sampling."
},
{
"number": "7",
"name": "A1",
"type": "input",
"description": "Analog signal input multiplexed internally; the driving source impedance should be less than or equal to 1 kΩ, otherwise use CSTART or long sampling."
},
{
"number": "8",
"name": "A2",
"type": "input",
"description": "Analog signal input multiplexed internally; the driving source impedance should be less than or equal to 1 kΩ, otherwise use CSTART or long sampling."
},
{
"number": "9",
"name": "A3",
"type": "input",
"description": "Analog signal input multiplexed internally; the driving source impedance should be less than or equal to 1 kΩ, otherwise use CSTART or long sampling."
},
{
"number": "10",
"name": "A4",
"type": "input",
"description": "Analog signal input multiplexed internally; the driving source impedance should be less than or equal to 1 kΩ, otherwise use CSTART or long sampling."
},
{
"number": "11",
"name": "A5",
"type": "input",
"description": "Analog signal input multiplexed internally; the driving source impedance should be less than or equal to 1 kΩ, otherwise use CSTART or long sampling."
},
{
"number": "12",
"name": "A6",
"type": "input",
"description": "Analog signal input multiplexed internally; the driving source impedance should be less than or equal to 1 kΩ, otherwise use CSTART or long sampling."
},
{
"number": "13",
"name": "A7",
"type": "input",
"description": "Analog signal input multiplexed internally; the driving source impedance should be less than or equal to 1 kΩ, otherwise use CSTART or long sampling."
},
{
"number": "14",
"name": "CSTART",
"type": "input",
"description": "Controls the start and length of sampling for extended sampling: the falling edge starts sampling and the rising edge (with CS high) starts conversion; tie to VCC if not used."
},
{
"number": "15",
"name": "GND",
"type": "power_in",
"description": "Ground return for the internal circuitry; all voltage measurements are referenced to GND."
},
{
"number": "16",
"name": "PWDN",
"type": "input",
"description": "When held at logic zero, both the analog and reference circuits are powered down; the device restarts via an active CS, FS or CSTART after this pin returns to logic one."
},
{
"number": "17",
"name": "FS",
"type": "input",
"description": "DSP frame sync input that marks the start of a serial frame; a high-to-low transition resets the 4-bit counter and enables SDI, and it should be tied to VCC if not used."
},
{
"number": "18",
"name": "REFM",
"type": "input",
"description": "External reference input or internal reference decoupling; the code 000h corresponds to VREFM."
},
{
"number": "19",
"name": "REFP",
"type": "input",
"description": "External reference input or internal reference decoupling; the maximum input range is the difference between REFP and REFM, with 10 µF and 0.1 µF shunt capacitors between REFP and REFM."
},
{
"number": "20",
"name": "CS",
"type": "input",
"description": "Chip select: a high-to-low transition resets the 4-bit counter, enables SDI and releases SDO from 3-state, and CS edges must occur while SCLK is low for SPI use."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
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"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The DW (20-pin SOIC) pin map was reconstructed from the page 1 figure text, whose names and numbers ; The excerpt does not include the DW package outline or pin-1 marking detail; pin 1 orientation is ta; The types for SDO (tri_state) and EOC/(INT) (output) follow the datasheet's '3-state output' and 'O'"
],
"pages_sent": 12,
"cost_usd": 0.0745,
"at": "2026-10-11T18:55:30"
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"url": "https://www.ti.com/cn/lit/gpn/tlv2548q",
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"metadata": {
"specs": {
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"Package": "SOIC-20-300mil",
"Category": "Data Acquisition",
"Pins": "20"
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