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Ray tlv2434aqdrq1: specified limits as data (metadata.characteristics, 60 rows from the datasheet) 52302c4 13d ago

TLV2434AQDRQ1

Texas Instruments · Operational Amplifier · SOIC-14

TLV2434AQDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OUT	output	Output of amplifier 1, which swings to both supply rails as stated for the TLV243x family.
2	1IN-	input	Inverting input of amplifier 1; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V.
3	1IN+	input	Non-inverting input of amplifier 1; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V, and the device does not phase-invert when the input is driven to the rail.
4	VDD+	power_in	Positive supply pin; the recommended supply range is 2.7 V to 10 V, and the absolute maximum is 12 V.
5	2IN+	input	Non-inverting input of amplifier 2; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V.
6	2IN-	input	Inverting input of amplifier 2; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V.
7	2OUT	output	Output of amplifier 2, which swings to both supply rails as stated for the TLV243x family.
8	3OUT	output	Output of amplifier 3, which swings to both supply rails as stated for the TLV243x family.
9	3IN-	input	Inverting input of amplifier 3; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V.
10	3IN+	input	Non-inverting input of amplifier 3; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V.
11	VDD-/GND	power_in	Negative supply pin, or ground in single-supply operation; the absolute maximum ratings are referenced to the midpoint between VDD+ and VDD-.
12	4IN+	input	Non-inverting input of amplifier 4; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V.
13	4IN-	input	Inverting input of amplifier 4; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V.
14	4OUT	output	Output of amplifier 4, which swings to both supply rails as stated for the TLV243x family.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-14
Category	Amplifiers/Comparators
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage (absolute maximum)	VDD			12	V		3
Input current (any input)	II	-5		5	mA	Any input	3
Output current	IO	-50		50	mA		3
Total current flowing into VDD+		-50		50	mA		3
Total current flowing out of VDD-		-50		50	mA		3
Operating free-air temperature range (Q suffix)	TA	-40		125	°C	Natural ventilation	3
Storage temperature range	Tstg	-65		150	°C		3
Lead temperature				260	°C	10 s, 1.6 mm (1/16 in) from case	3
Supply voltage (recommended)	VDD	2.7		10	V		3
Operating free-air temperature (recommended)	TA	-40		125	°C	Natural ventilation	3
Rated power dissipation, D (14) package				1022	mW	TA ≤ 25°C; derating factor 7.6 mW/°C above TA = 25°C	3
Rated power dissipation, D (14) package				900	mW	TA = 70°C	3
Rated power dissipation, D (14) package				777	mW	TA = 85°C	3
Rated power dissipation, D (14) package				450	mW	TA = 125°C	3
Input offset voltage (TLV243xA)	VIO		300	950	μV	VDD = 3 V; VIC = 0, VO = 0, VDD± = ±1.5 V, RS = 50 Ω; TA = 25°C	4
Input offset voltage (TLV243xA), full range	VIO			1600	μV	VDD = 3 V; VIC = 0, VO = 0, VDD± = ±1.5 V, RS = 50 Ω; full range −40°C to 125°C	4
Input offset current, full range	IIO			150	pA	VDD = 3 V; full range −40°C to 125°C	4
Input bias current, full range	IIB			300	pA	VDD = 3 V; full range −40°C to 125°C	4
Common-mode input voltage range	VICR	0		2.5	V	VDD = 3 V; /VIO/ ≤ 5 mV, RS = 50 Ω; TA = 25°C	4
Common-mode input voltage range, full range	VICR	0.2		2.2	V	VDD = 3 V; /VIO/ ≤ 5 mV, RS = 50 Ω; full range −40°C to 125°C	4
High-level output voltage	VOH	2.98			V	VDD = 3 V; IO = −100 μA; TA = 25°C	4
High-level output voltage	VOH	2.5			V	VDD = 3 V; IO = −3 mA; TA = 25°C	4
High-level output voltage, full range	VOH	2.25			V	VDD = 3 V; IO = −3 mA; full range −40°C to 125°C	4
Low-level output voltage	VOL			0.02	V	VDD = 3 V; VIC = 1.5 V, IOL = 100 μA; TA = 25°C	4
Low-level output voltage	VOL			0.83	V	VDD = 3 V; VIC = 1.5 V, IOL = 3 mA; TA = 25°C	4
Low-level output voltage, full range	VOL			1	V	VDD = 3 V; VIC = 1.5 V, IOL = 3 mA; full range −40°C to 125°C	4
Large-signal differential voltage amplification	AVD	1.5	2.5		V/mV	VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 2 kΩ (referenced to 2.5 V); TA = 25°C	4
Large-signal differential voltage amplification, full range	AVD	0.5			V/mV	VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 2 kΩ (referenced to 2.5 V); full range −40°C to 125°C	4
Large-signal differential voltage amplification (RL = 1 MΩ)	AVD	750			V/mV	VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 1 MΩ (referenced to 2.5 V); TA = 25°C	4
Common-mode rejection ratio	CMRR	63	83		dB	VDD = 3 V; VIC = VICR min, VO = 1.5 V, RS = 50 Ω; TA = 25°C	4
Common-mode rejection ratio, full range	CMRR	63			dB	VDD = 3 V; VIC = VICR min, VO = 1.5 V, RS = 50 Ω; full range −40°C to 125°C	4
Supply voltage rejection ratio (ΔVDD±/ΔVIO)	kSVR	80	95		dB	VDD = 2.7 V to 8 V, VIC = VDD/2, no load; TA = 25°C	4
Supply voltage rejection ratio, full range	kSVR	80			dB	VDD = 2.7 V to 8 V, VIC = VDD/2, no load; full range −40°C to 125°C	4
Supply current per channel	IDD		115	150	μA	VDD = 3 V; VO = 1.5 V, no load; TA = 25°C	4
Supply current per channel, full range	IDD			175	μA	VDD = 3 V; VO = 1.5 V, no load; full range −40°C to 125°C	5
Slew rate at unity gain	SR	0.15	0.25		V/μs	VDD = 3 V; VO = 1 V to 2 V, RL = 2 kΩ, CL = 100 pF; TA = 25°C	5
Slew rate at unity gain, full range	SR	0.1			V/μs	VDD = 3 V; VO = 1 V to 2 V, RL = 2 kΩ, CL = 100 pF; full range −40°C to 125°C	5
Input offset voltage (TLV243xA)	VIO		300	950	μV	VDD = 5 V; VIC = 0, VO = 0, VDD± = ±2.5 V, RS = 50 Ω; TA = 25°C	6
Input offset voltage (TLV243xA), full range	VIO			2000	μV	VDD = 5 V; VIC = 0, VO = 0, VDD± = ±2.5 V, RS = 50 Ω; full range −40°C to 125°C	6
Input offset current, full range	IIO			150	pA	VDD = 5 V; full range −40°C to 125°C	6
Input bias current, full range	IIB			300	pA	VDD = 5 V; full range −40°C to 125°C	6
Common-mode input voltage range	VICR	0		4.5	V	VDD = 5 V; /VIO/ ≤ 5 mV, RS = 50 Ω; TA = 25°C	6
Common-mode input voltage range, full range	VICR	0		4.2	V	VDD = 5 V; /VIO/ ≤ 5 mV, RS = 50 Ω; full range −40°C to 125°C	6
High-level output voltage	VOH	4.97			V	VDD = 5 V; IOH = −100 μA; TA = 25°C	6
High-level output voltage	VOH	4	4.35		V	VDD = 5 V; IOH = −5 mA; TA = 25°C	6
High-level output voltage, full range	VOH	4			V	VDD = 5 V; IOH = −5 mA; full range −40°C to 125°C	6
Low-level output voltage	VOL			0.01	V	VDD = 5 V; VIC = 2.5 V, IOL = 100 μA; TA = 25°C	6
Low-level output voltage	VOL			0.8	V	VDD = 5 V; VIC = 2.5 V, IOL = 5 mA; TA = 25°C	6
Low-level output voltage, full range	VOL			1.25	V	VDD = 5 V; VIC = 2.5 V, IOL = 5 mA; full range −40°C to 125°C	6
Large-signal differential voltage amplification	AVD	2.5	3.8		V/mV	VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 2 kΩ (referenced to 2.5 V); TA = 25°C	6
Large-signal differential voltage amplification, full range	AVD	0.5			V/mV	VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 2 kΩ (referenced to 2.5 V); full range −40°C to 125°C	6
Large-signal differential voltage amplification (RL = 1 MΩ)	AVD	950			V/mV	VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 1 MΩ (referenced to 2.5 V); TA = 25°C	6
Common-mode rejection ratio	CMRR	63	90		dB	VDD = 5 V; VIC = VICR min, VO = 2.5 V, RS = 50 Ω; TA = 25°C	6
Common-mode rejection ratio, full range	CMRR	63			dB	VDD = 5 V; VIC = VICR min, VO = 2.5 V, RS = 50 Ω; full range −40°C to 125°C	6
Supply voltage rejection ratio (ΔVDD/ΔVIO)	kSVR	80	95		dB	VDD = 4.4 V to 8 V, VIC = VDD/2, no load; TA = 25°C	6
Supply voltage rejection ratio, full range	kSVR	80			dB	VDD = 4.4 V to 8 V, VIC = VDD/2, no load; full range −40°C to 125°C	6
Supply current per channel	IDD		115	150	μA	VDD = 5 V; VO = 2.5 V, no load; TA = 25°C	6
Supply current per channel, full range	IDD			175	μA	VDD = 5 V; VO = 2.5 V, no load; full range −40°C to 125°C	6
Slew rate at unity gain	SR	0.15	0.25		V/μs	VDD = 5 V; VO = 1.5 V to 3.5 V, RL = 2 kΩ, CL = 100 pF; TA = 25°C	7
Slew rate at unity gain, full range	SR	0.1			V/μs	VDD = 5 V; VO = 1.5 V to 3.5 V, RL = 2 kΩ, CL = 100 pF; full range −40°C to 125°C	7

CAD (KiCad official)

Symbol: TLV2434AQDRQ1
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)
3D model files: tlv2434aqdrq1-etched.step / tlv2434aqdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2434aqdrq1.step / tlv2434aqdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (38 pp, sha256 467245f5275e2776, retrieved 2026-10-12, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TLV2434AQDRQ1

**Texas Instruments** · Operational Amplifier · SOIC-14

TLV2434AQDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OUT | output | Output of amplifier 1, which swings to both supply rails as stated for the TLV243x family. |
| 2 | 1IN- | input | Inverting input of amplifier 1; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V. |
| 3 | 1IN+ | input | Non-inverting input of amplifier 1; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V, and the device does not phase-invert when the input is driven to the rail. |
| 4 | VDD+ | power_in | Positive supply pin; the recommended supply range is 2.7 V to 10 V, and the absolute maximum is 12 V. |
| 5 | 2IN+ | input | Non-inverting input of amplifier 2; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V. |
| 6 | 2IN- | input | Inverting input of amplifier 2; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V. |
| 7 | 2OUT | output | Output of amplifier 2, which swings to both supply rails as stated for the TLV243x family. |
| 8 | 3OUT | output | Output of amplifier 3, which swings to both supply rails as stated for the TLV243x family. |
| 9 | 3IN- | input | Inverting input of amplifier 3; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V. |
| 10 | 3IN+ | input | Non-inverting input of amplifier 3; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V. |
| 11 | VDD-/GND | power_in | Negative supply pin, or ground in single-supply operation; the absolute maximum ratings are referenced to the midpoint between VDD+ and VDD-. |
| 12 | 4IN+ | input | Non-inverting input of amplifier 4; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V. |
| 13 | 4IN- | input | Inverting input of amplifier 4; the common-mode input range is 0 V to 4.5 V minimum at VDD = 5 V. |
| 14 | 4OUT | output | Output of amplifier 4, which swings to both supply rails as stated for the TLV243x family. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Amplifiers/Comparators |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VDD |  |  | 12 | V |  | 3 |
| Input current (any input) | II | -5 |  | 5 | mA | Any input | 3 |
| Output current | IO | -50 |  | 50 | mA |  | 3 |
| Total current flowing into VDD+ |  | -50 |  | 50 | mA |  | 3 |
| Total current flowing out of VDD- |  | -50 |  | 50 | mA |  | 3 |
| Operating free-air temperature range (Q suffix) | TA | -40 |  | 125 | °C | Natural ventilation | 3 |
| Storage temperature range | Tstg | -65 |  | 150 | °C |  | 3 |
| Lead temperature |  |  |  | 260 | °C | 10 s, 1.6 mm (1/16 in) from case | 3 |
| Supply voltage (recommended) | VDD | 2.7 |  | 10 | V |  | 3 |
| Operating free-air temperature (recommended) | TA | -40 |  | 125 | °C | Natural ventilation | 3 |
| Rated power dissipation, D (14) package |  |  |  | 1022 | mW | TA ≤ 25°C; derating factor 7.6 mW/°C above TA = 25°C | 3 |
| Rated power dissipation, D (14) package |  |  |  | 900 | mW | TA = 70°C | 3 |
| Rated power dissipation, D (14) package |  |  |  | 777 | mW | TA = 85°C | 3 |
| Rated power dissipation, D (14) package |  |  |  | 450 | mW | TA = 125°C | 3 |
| Input offset voltage (TLV243xA) | VIO |  | 300 | 950 | μV | VDD = 3 V; VIC = 0, VO = 0, VDD± = ±1.5 V, RS = 50 Ω; TA = 25°C | 4 |
| Input offset voltage (TLV243xA), full range | VIO |  |  | 1600 | μV | VDD = 3 V; VIC = 0, VO = 0, VDD± = ±1.5 V, RS = 50 Ω; full range −40°C to 125°C | 4 |
| Input offset current, full range | IIO |  |  | 150 | pA | VDD = 3 V; full range −40°C to 125°C | 4 |
| Input bias current, full range | IIB |  |  | 300 | pA | VDD = 3 V; full range −40°C to 125°C | 4 |
| Common-mode input voltage range | VICR | 0 |  | 2.5 | V | VDD = 3 V; /VIO/ ≤ 5 mV, RS = 50 Ω; TA = 25°C | 4 |
| Common-mode input voltage range, full range | VICR | 0.2 |  | 2.2 | V | VDD = 3 V; /VIO/ ≤ 5 mV, RS = 50 Ω; full range −40°C to 125°C | 4 |
| High-level output voltage | VOH | 2.98 |  |  | V | VDD = 3 V; IO = −100 μA; TA = 25°C | 4 |
| High-level output voltage | VOH | 2.5 |  |  | V | VDD = 3 V; IO = −3 mA; TA = 25°C | 4 |
| High-level output voltage, full range | VOH | 2.25 |  |  | V | VDD = 3 V; IO = −3 mA; full range −40°C to 125°C | 4 |
| Low-level output voltage | VOL |  |  | 0.02 | V | VDD = 3 V; VIC = 1.5 V, IOL = 100 μA; TA = 25°C | 4 |
| Low-level output voltage | VOL |  |  | 0.83 | V | VDD = 3 V; VIC = 1.5 V, IOL = 3 mA; TA = 25°C | 4 |
| Low-level output voltage, full range | VOL |  |  | 1 | V | VDD = 3 V; VIC = 1.5 V, IOL = 3 mA; full range −40°C to 125°C | 4 |
| Large-signal differential voltage amplification | AVD | 1.5 | 2.5 |  | V/mV | VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 2 kΩ (referenced to 2.5 V); TA = 25°C | 4 |
| Large-signal differential voltage amplification, full range | AVD | 0.5 |  |  | V/mV | VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 2 kΩ (referenced to 2.5 V); full range −40°C to 125°C | 4 |
| Large-signal differential voltage amplification (RL = 1 MΩ) | AVD | 750 |  |  | V/mV | VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 1 MΩ (referenced to 2.5 V); TA = 25°C | 4 |
| Common-mode rejection ratio | CMRR | 63 | 83 |  | dB | VDD = 3 V; VIC = VICR min, VO = 1.5 V, RS = 50 Ω; TA = 25°C | 4 |
| Common-mode rejection ratio, full range | CMRR | 63 |  |  | dB | VDD = 3 V; VIC = VICR min, VO = 1.5 V, RS = 50 Ω; full range −40°C to 125°C | 4 |
| Supply voltage rejection ratio (ΔVDD±/ΔVIO) | kSVR | 80 | 95 |  | dB | VDD = 2.7 V to 8 V, VIC = VDD/2, no load; TA = 25°C | 4 |
| Supply voltage rejection ratio, full range | kSVR | 80 |  |  | dB | VDD = 2.7 V to 8 V, VIC = VDD/2, no load; full range −40°C to 125°C | 4 |
| Supply current per channel | IDD |  | 115 | 150 | μA | VDD = 3 V; VO = 1.5 V, no load; TA = 25°C | 4 |
| Supply current per channel, full range | IDD |  |  | 175 | μA | VDD = 3 V; VO = 1.5 V, no load; full range −40°C to 125°C | 5 |
| Slew rate at unity gain | SR | 0.15 | 0.25 |  | V/μs | VDD = 3 V; VO = 1 V to 2 V, RL = 2 kΩ, CL = 100 pF; TA = 25°C | 5 |
| Slew rate at unity gain, full range | SR | 0.1 |  |  | V/μs | VDD = 3 V; VO = 1 V to 2 V, RL = 2 kΩ, CL = 100 pF; full range −40°C to 125°C | 5 |
| Input offset voltage (TLV243xA) | VIO |  | 300 | 950 | μV | VDD = 5 V; VIC = 0, VO = 0, VDD± = ±2.5 V, RS = 50 Ω; TA = 25°C | 6 |
| Input offset voltage (TLV243xA), full range | VIO |  |  | 2000 | μV | VDD = 5 V; VIC = 0, VO = 0, VDD± = ±2.5 V, RS = 50 Ω; full range −40°C to 125°C | 6 |
| Input offset current, full range | IIO |  |  | 150 | pA | VDD = 5 V; full range −40°C to 125°C | 6 |
| Input bias current, full range | IIB |  |  | 300 | pA | VDD = 5 V; full range −40°C to 125°C | 6 |
| Common-mode input voltage range | VICR | 0 |  | 4.5 | V | VDD = 5 V; /VIO/ ≤ 5 mV, RS = 50 Ω; TA = 25°C | 6 |
| Common-mode input voltage range, full range | VICR | 0 |  | 4.2 | V | VDD = 5 V; /VIO/ ≤ 5 mV, RS = 50 Ω; full range −40°C to 125°C | 6 |
| High-level output voltage | VOH | 4.97 |  |  | V | VDD = 5 V; IOH = −100 μA; TA = 25°C | 6 |
| High-level output voltage | VOH | 4 | 4.35 |  | V | VDD = 5 V; IOH = −5 mA; TA = 25°C | 6 |
| High-level output voltage, full range | VOH | 4 |  |  | V | VDD = 5 V; IOH = −5 mA; full range −40°C to 125°C | 6 |
| Low-level output voltage | VOL |  |  | 0.01 | V | VDD = 5 V; VIC = 2.5 V, IOL = 100 μA; TA = 25°C | 6 |
| Low-level output voltage | VOL |  |  | 0.8 | V | VDD = 5 V; VIC = 2.5 V, IOL = 5 mA; TA = 25°C | 6 |
| Low-level output voltage, full range | VOL |  |  | 1.25 | V | VDD = 5 V; VIC = 2.5 V, IOL = 5 mA; full range −40°C to 125°C | 6 |
| Large-signal differential voltage amplification | AVD | 2.5 | 3.8 |  | V/mV | VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 2 kΩ (referenced to 2.5 V); TA = 25°C | 6 |
| Large-signal differential voltage amplification, full range | AVD | 0.5 |  |  | V/mV | VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 2 kΩ (referenced to 2.5 V); full range −40°C to 125°C | 6 |
| Large-signal differential voltage amplification (RL = 1 MΩ) | AVD | 950 |  |  | V/mV | VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 1 MΩ (referenced to 2.5 V); TA = 25°C | 6 |
| Common-mode rejection ratio | CMRR | 63 | 90 |  | dB | VDD = 5 V; VIC = VICR min, VO = 2.5 V, RS = 50 Ω; TA = 25°C | 6 |
| Common-mode rejection ratio, full range | CMRR | 63 |  |  | dB | VDD = 5 V; VIC = VICR min, VO = 2.5 V, RS = 50 Ω; full range −40°C to 125°C | 6 |
| Supply voltage rejection ratio (ΔVDD/ΔVIO) | kSVR | 80 | 95 |  | dB | VDD = 4.4 V to 8 V, VIC = VDD/2, no load; TA = 25°C | 6 |
| Supply voltage rejection ratio, full range | kSVR | 80 |  |  | dB | VDD = 4.4 V to 8 V, VIC = VDD/2, no load; full range −40°C to 125°C | 6 |
| Supply current per channel | IDD |  | 115 | 150 | μA | VDD = 5 V; VO = 2.5 V, no load; TA = 25°C | 6 |
| Supply current per channel, full range | IDD |  |  | 175 | μA | VDD = 5 V; VO = 2.5 V, no load; full range −40°C to 125°C | 6 |
| Slew rate at unity gain | SR | 0.15 | 0.25 |  | V/μs | VDD = 5 V; VO = 1.5 V to 3.5 V, RL = 2 kΩ, CL = 100 pF; TA = 25°C | 7 |
| Slew rate at unity gain, full range | SR | 0.1 |  |  | V/μs | VDD = 5 V; VO = 1.5 V to 3.5 V, RL = 2 kΩ, CL = 100 pF; full range −40°C to 125°C | 7 |

## CAD (KiCad official)

- Symbol: `TLV2434AQDRQ1`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `tlv2434aqdrq1-etched.step` / `tlv2434aqdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv2434aqdrq1.step` / `tlv2434aqdrq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv2432a-q1) (38 pp, sha256 `467245f5275e2776`, retrieved 2026-10-12, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlv2434aqdrq1-datasheet.pdf)