TLV1544IDR

{
  "slug": "tlv1544idr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Analog To Digital Converters (ADC), SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "tlv1544idr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tlv1544idr.kicad_sym",
    "tlv1544idr.kicad_mod",
    "tlv1544idr.glb",
    "tlv1544idr.step",
    "tlv1544idr.lbr",
    "docs/hero.png",
    "docs/tlv1544idr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tlv1544idr-hero.glb",
    "tlv1544idr-hero.overlay.json"
  ],
  "component": {
    "mpn": "TLV1544IDR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Data Acquisition",
    "subcategory": "Analog To Digital Converters (ADC)",
    "datasheet": "https://www.ti.com/lit/ds/symlink/tlv1544.pdf",
    "parts": {
      "symbol": "tlv1544idr.kicad_sym",
      "footprint": "tlv1544idr.kicad_mod",
      "model_3d": "tlv1544idr-hero.glb",
      "model_3d_plain": "tlv1544idr.glb",
      "model_3d_step": "tlv1544idr-etched.step",
      "model_3d_step_plain": "tlv1544idr.step",
      "lbr": "tlv1544idr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2864347",
      "digikey": "TLV1544IDR-ND",
      "mouser": "595-TLV1544IDR"
    },
    "distributor_check": {
      "checked_at": "2026-10-12T10:01:30Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "TLV1544IDR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TLV1544IDR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DATA OUT",
        "type": "tri_state",
        "description": "Three-state serial output of the A/D conversion result, high-impedance when CS is high and active when CS is low, changing on the falling I/O CLK edge in microprocessor mode or the rising edge in DSP mode."
      },
      {
        "number": "2",
        "name": "DATA IN",
        "type": "input",
        "description": "Serial data input that carries the 4-bit channel and test-voltage select (and can set conversion rate and power-down), MSB first, sampled on the first four I/O CLK edges after CS↓ (or FS↓ in DSP mode) and ignored for the rest of the conversion."
      },
      {
        "number": "3",
        "name": "I/O CLK",
        "type": "input",
        "description": "Serial input/output clock that clocks in the input data, starts sampling on the fourth edge, and hands conversion control to the internal state machine on the tenth edge; maximum frequency is 10 MHz and depends on VCC and source impedance (Table 1)."
      },
      {
        "number": "4",
        "name": "EOC",
        "type": "output",
        "description": "End-of-conversion output that goes low on the tenth I/O CLK rising edge (microprocessor mode) or falling edge (DSP mode) and returns high when the conversion is complete and data is ready."
      },
      {
        "number": "5",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage, specified from 2.7 V to 5.5 V dc."
      },
      {
        "number": "6",
        "name": "A0",
        "type": "input",
        "description": "Multiplexed analog input channel 0, with an analog input range of 0 V to VCC; for source impedance above 1 kΩ, the asynchronous start should be used to lengthen sampling time."
      },
      {
        "number": "7",
        "name": "A1",
        "type": "input",
        "description": "Multiplexed analog input channel 1, with an analog input range of 0 V to VCC; for source impedance above 1 kΩ, the asynchronous start should be used to lengthen sampling time."
      },
      {
        "number": "8",
        "name": "A2",
        "type": "input",
        "description": "Multiplexed analog input channel 2, with an analog input range of 0 V to VCC; for source impedance above 1 kΩ, the asynchronous start should be used to lengthen sampling time."
      },
      {
        "number": "9",
        "name": "A3",
        "type": "input",
        "description": "Multiplexed analog input channel 3, with an analog input range of 0 V to VCC; for source impedance above 1 kΩ, the asynchronous start should be used to lengthen sampling time."
      },
      {
        "number": "10",
        "name": "CSTART",
        "type": "input",
        "description": "Sampling/conversion start control in which a high-to-low transition starts sampling, a low-to-high transition starts conversion, and the low duration sets the sampling time; tie to VCC if not used."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Ground return for internal circuitry; all voltage measurements are referenced to GND."
      },
      {
        "number": "12",
        "name": "INV CLK",
        "type": "input",
        "description": "Inverted clock select, tied to GND when an inverted I/O CLK is used and to VCC when it is not inverted; it can also invoke a built-in test mode."
      },
      {
        "number": "13",
        "name": "FS",
        "type": "input",
        "description": "DSP frame synchronization input that marks the start of a serial data frame; it must be tied to VCC when interfacing with a microprocessor."
      },
      {
        "number": "14",
        "name": "REF–",
        "type": "input",
        "description": "Lower reference voltage, nominally ground, which together with REF+ sets the maximum input voltage range."
      },
      {
        "number": "15",
        "name": "REF+",
        "type": "input",
        "description": "Upper reference voltage, nominally VCC, which together with REF- sets the maximum input voltage range."
      },
      {
        "number": "16",
        "name": "CS",
        "type": "input",
        "description": "Chip select in which a high-to-low transition resets the internal counters and enables DATA IN, DATA OUT and I/O CLK, and a low-to-high transition disables them within the specified setup time."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers are the D (SOIC-16) column from the Terminal Functions table, which the datasheet footno; The datasheet's pinout diagram text was extracted out of order, so the pin-to-name mapping was taken; A4 to A7 are not present on the SOIC-16 package. The TLV1544 has only four analog inputs (A0 to A3),"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0685,
        "at": "2026-10-12T10:01:12"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/tlv1544.pdf",
        "pages": 38,
        "sha256": "6a6c65b5e7263803",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tlv1544idr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-12",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tlv1544idr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c57b28476859543cd0a593a2ffd623b6e1ee2571593c58e05337fb4f98458c6b",
        "checked": "2026-10-12",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}