TLP7830

{
  "slug": "tlp7830",
  "version": "0.1.0",
  "type": "component",
  "description": "TOSHIBA Pre-Ordered Products, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "electronic tools-instruments-consumables",
    "tlp7830",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tlp7830.kicad_sym",
    "tlp7830.kicad_mod",
    "tlp7830.glb",
    "tlp7830.step",
    "tlp7830.lbr",
    "docs/hero.png",
    "docs/tlp7830-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tlp7830-hero.glb",
    "tlp7830-hero.overlay.json",
    "tlp7830-etched.glb"
  ],
  "component": {
    "mpn": "TLP7830",
    "manufacturer": "TOSHIBA",
    "package": "SO-8",
    "pin_count": 8,
    "category": "Electronic Tools/Instruments/Consumables",
    "subcategory": "Pre-Ordered Products",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590208022296223744",
    "parts": {
      "symbol": "tlp7830.kicad_sym",
      "footprint": "tlp7830.kicad_mod",
      "model_3d": "tlp7830-hero.glb",
      "model_3d_plain": "tlp7830-etched.glb",
      "model_3d_step": "tlp7830-etched.step",
      "model_3d_step_plain": "tlp7830.step",
      "lbr": "tlp7830.lbr"
    },
    "distributor_links": {
      "lcsc": "C2931196"
    },
    "distributor_check": {
      "checked_at": "2026-10-17T18:37:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD1",
        "type": "power_in",
        "description": "Input side supply voltage, recommended 4.5 to 5.5 V, requiring a 0.1 µF bypass capacitor to pin 4."
      },
      {
        "number": "2",
        "name": "VIN+",
        "type": "power_in",
        "description": "Positive analog input, specified for -200 to 200 mV (FSR ±320 mV), and must not be raised to VDD1 - 2 V or above to stay in functional mode."
      },
      {
        "number": "3",
        "name": "VIN-",
        "type": "power_in",
        "description": "Negative analog input, specified for -200 to 200 mV, and must not be raised to VDD1 - 2 V or above to stay in functional mode."
      },
      {
        "number": "4",
        "name": "GND1",
        "type": "power_in",
        "description": "Input side ground, serving as the return for VDD1 and requiring a 0.1 µF bypass capacitor to pin 1."
      },
      {
        "number": "5",
        "name": "GND2",
        "type": "power_in",
        "description": "Output side ground, requiring a 0.1 µF bypass capacitor to pin 8."
      },
      {
        "number": "6",
        "name": "MDAT",
        "type": "output",
        "description": "Modulator data output, with the digital output voltage rated -0.5 to 6 V (absolute maximum) and output power dissipation of 48 mW."
      },
      {
        "number": "7",
        "name": "MCLK",
        "type": "output",
        "description": "Modulator clock output, running at 10 MHz typical (8.5 to 11.5 MHz) with a 15 pF load."
      },
      {
        "number": "8",
        "name": "VDD2",
        "type": "power_in",
        "description": "Output side supply voltage, specified for 3 to 5.5 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet names the package only as '11-6B1A' (page 14). The text never states 'SO-8'; the 8-pin; The datasheet does not state a separate pinout for any other variant. The TLP7830(TP4,E tape-and-ree; Pin 2 and pin 3 types are KiCad 'input' classes, and MDAT/MCLK are 'output' per the description. The"
        ],
        "pages_sent": 15,
        "cost_usd": 0.0493,
        "at": "2026-10-17T18:35:39"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590208022296223744",
        "pages": 15,
        "sha256": "046c03003c4fcbfa",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tlp7830.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tlp7830-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "0a88b729fb7a826f5369de7d54588919d557c7683bad032b34c09b855a882b4c",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}