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TLE62083GXUMA1

Infineon Technologies · Motor Driver ICs · SOIC-14

TLE62083GXUMA1 from Infineon Technologies, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference potential, internally connected to pins 7, 8 and 14 and the cooling tab; place PCB cooling areas close to these pins to reduce thermal resistance.
2 OUT3 output Half-bridge output 3 connected internally to high-side and low-side switches, short circuit protected and open load controlled, with no internal clamp diode or active zenering.
3 VS power_in Power supply (operating up to 40 V) that needs a blocking capacitor close to GND of 22 µF electrolytic in parallel with 220 nF ceramic.
4 CSN input Active-low chip-select input with internal active pull-up and CMOS logic levels; should only be transitioned when CLK is low.
5 DI input Serial data input receiving a 16-bit control word LSB first, sampled on the falling edge of CLK, with active pull-down and CMOS logic levels.
6 CLK input Serial clock input that clocks the shift register, with internal active pull-down and CMOS logic levels (max 1 MHz).
7 GND power_in Ground, internally connected to pin 1 (see pin 1).
8 GND power_in Ground, internally connected to pin 1 (see pin 1).
9 DO tri_state Serial data output that transfers diagnosis data to the control device and stays 3-stated unless selected by a low on CSN.
10 INH input Inhibit input with internal pull-down; pulling it low switches the device into standby.
11 VCC power_in Logic supply voltage (4.75 V to 5.5 V) that needs a blocking capacitor close to GND of 10 µF electrolytic in parallel with 220 nF ceramic.
12 OUT2 output Half-bridge output 2, same structure and protection as OUT3 (see pin 2).
13 OUT1 output Half-bridge output 1, same structure and protection as OUT3 (see pin 2).
14 GND power_in Ground, internally connected to pin 1 (see pin 1).

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOIC-14
Category Power Management ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VS -0.3 40 V 7
Logic supply voltage VCC -0.3 5.5 V 0 V < VS < 40 V 7
Logic input voltages (DI, CLK, CSN, INH) VI -0.3 5.5 V 0 V < VS < 40 V; 0 V < VCC < 5.5 V 7
Logic output voltage (DO) VDO -0.3 5.5 V 0 V < VS < 40 V; 0 V < VCC < 5.5 V 7
Output voltage (OUT 1-3) VOUT -0.3 40 V 0 V < VS < 40 V 7
Junction temperature Tj -40 150 °C 7
Storage temperature Tstg -50 150 °C 7
Logic supply voltage VCC 4.75 5.5 V 8
Supply voltage VS 40 V min is VUV OFF; after VS rising above VUV ON 8
Supply voltage slew rate dVS/dt 10 V/µs 8
Logic input voltage (DI, CLK, CSN, INH) VI -0.3 V max is VCC 8
SPI clock frequency fCLK 1 MHz 8
Junction temperature Tj -40 150 °C 8
Thermal resistance junction-pin Rthj-pin 30 K/W measured to pin 1, 7, 8, 14 9
Thermal resistance junction-ambient RthjA 65 K/W 9
Quiescent current IS 8 20 µA INH = Low; VS = 13.2 V; Tj = 25 °C 9
Quiescent current IS 30 µA INH = Low; VS = 13.2 V 9
Logic-Supply current ICC 2 10 µA INH = Low 9
Logic-Supply current ICC 1 2 mA SPI not active 9
Supply current IS 2 5 mA 9
UV-Switch-ON voltage VUV ON 6.5 7 V VS increasing 9
UV-Switch-OFF voltage VUV OFF 5.6 6.1 6.6 V VS decreasing 9
UV-ON/OFF-Hysteresis VUV HY 0.4 V VUV ON, VUV OFF 9
OV-Switch-OFF voltage VOV OFF 34 37 40 V VS increasing 9
OV-Switch-ON voltage VOV ON 30 33 36 V VS decreasing 9
OV-ON/OFF-Hysteresis VOV HY 4 V VOV OFF, VOV ON 9
Drain-source on resistance, source (high-side) RDS ON H 0.8 0.95 Ω IOUT = -0.5 A; 8 V < VS < 40 V; Tj = 25 °C 10
Drain-source on resistance, source (high-side) RDS ON H 1.6 Ω IOUT = -0.5 A; 8 V < VS < 40 V 10
Drain-source on resistance, sink (low-side) RDS ON L 0.75 0.9 Ω IOUT = 0.5 A; 8 V < VS < 40 V; Tj = 25 °C 10
Drain-source on resistance, sink (low-side) RDS ON L 1.5 Ω IOUT = 0.5 A; 8 V < VS < 40 V 10
Leakage current source-output-stage 1 to 3 IQLH -5 -1 µA VOUT1-3 = 0 V 10
Leakage current sink-output-stage 1 to 3 IQLL 150 300 µA VOUT1-3 = VS 10
Source shutdown threshold ISDU -2 -1.3 -1 A 10
Sink shutdown threshold ISDL 1 1.2 2 A 10
Current limit IOCL 2.4 4 A sink and source 10
Shutdown delay time tdSD 10 28 40 µs sink and source 10
Open circuit detection current IOCD 15 30 45 mA 10
Open circuit delay time tdOC 200 370 600 µs 11
Source ON delay time td ON H 8 20 µs VS = 13.2 V; RLoad = 25 Ω 11
Source OFF delay time td OFF H 4 20 µs VS = 13.2 V; RLoad = 25 Ω 11
Sink ON delay time td ON L 7 20 µs VS = 13.2 V; RLoad = 25 Ω 11
Sink OFF delay time td OFF L 3 20 µs VS = 13.2 V; RLoad = 25 Ω 11
Source ON switching time tON H 5 20 µs VS = 13.2 V; RLoad = 25 Ω 11
Sink ON switching time tON L 2 10 µs VS = 13.2 V; RLoad = 25 Ω 11
Sink OFF switching time tOFF L 1.5 5 µs VS = 13.2 V; RLoad = 25 Ω 11
Clamp diode forward voltage upper VFU 0.9 1.3 V IF = 0.5 A 11
Clamp diode forward voltage lower VFL 0.9 1.3 V IF = 0.5 A 11
Inhibit H-input voltage threshold VIH 0.52 0.7 VCC 11
Inhibit L-input voltage threshold VIL 0.2 0.48 VCC 11
Inhibit input hysteresis VIHY 50 200 500 mV 11
Inhibit pull down current II 5 25 100 µA VI = 0.2 × VCC 11
Setup time standby to data in / POR tset 100 µs 12
Pull up current at pin CSN IICSN -50 -25 -10 µA VCSN = 0.7 × VCC 12
Pull down current at pin DI IIDI 10 25 50 µA VDI = 0.2 × VCC 12
Pull down current at pin CLK IICLK 10 25 50 µA VCLK = 0.2 × VCC 12
DO L-output voltage level VDOL 0.2 0.4 V IDOL = -1.6 mA 12
DO tri-state leakage current IDOLK -10 0 10 µA VCSN = VCC; 0 V < VDO < VCC 12
Clock period tpCLK 1000 ns 13
Thermal shutdown junction temperature TjSD 150 175 200 °C 14
Thermal prewarning junction temperature TjPW 120 145 170 °C 13

CAD (KiCad official)

  • Symbol: TLE62083GXUMA1
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tle62083gxuma1-etched.step / tle62083gxuma1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle62083gxuma1.step / tle62083gxuma1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (22 pp, sha256 6961f1616452195c, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF