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TLC7701QPWR
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Texas Instruments Monitors & Reset Circuits, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLC7701QPWR
Texas Instruments · Monitors & Reset Circuits · TSSOP-8
TLC7701QPWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CONTROL | input | Control input for static-RAM power-down support; when tied to GND, RESET acts as active high, with input levels VIL max 0.2×VDD and VIH min 0.7×VDD. |
| 2 | RESIN | input | Reset input that, together with CONTROL and SENSE, determines the RESET and RESET output states per the function table, with VIL max 0.2×VDD and VIH min 0.7×VDD. |
| 3 | CT | passive | External timing capacitor connection that sets the reset delay time td = 2.1 × 10^4 × CT (CT in farads, td in seconds). |
| 4 | GND | power_in | Ground reference for the device; all voltage values are with respect to GND. |
| 5 | RESET | output | Active-low reset output (totem-pole), asserted when VDD reaches 1 V or SENSE is below threshold, rated for 2 mA high or low output current. |
| 6 | RESET | output | Active-high reset output (totem-pole) with 2 mA recommended output current, which is the complement of the active-low reset output. |
| 7 | SENSE | input | Voltage-sense input compared to the negative-going threshold (1.1 V typ for TLC7701, set by two external resistors), absolute maximum input range -0.3 to 7 V. |
| 8 | VDD | power_in | Supply voltage input, recommended operating range 2 V to 6 V with 7 V absolute maximum, and a 0.1 µF ceramic bypass capacitor recommended nearby. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-8 |
| Category | Power Supply Chip |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TLC7701QPWR - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
tlc7701qpwr-etched.step/tlc7701qpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc7701qpwr.step/tlc7701qpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
3147b2830d2531af, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLC7701QPWR
**Texas Instruments** · Monitors & Reset Circuits · TSSOP-8
TLC7701QPWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CONTROL | input | Control input for static-RAM power-down support; when tied to GND, RESET acts as active high, with input levels VIL max 0.2×VDD and VIH min 0.7×VDD. |
| 2 | RESIN | input | Reset input that, together with CONTROL and SENSE, determines the RESET and RESET output states per the function table, with VIL max 0.2×VDD and VIH min 0.7×VDD. |
| 3 | CT | passive | External timing capacitor connection that sets the reset delay time td = 2.1 × 10^4 × CT (CT in farads, td in seconds). |
| 4 | GND | power_in | Ground reference for the device; all voltage values are with respect to GND. |
| 5 | RESET | output | Active-low reset output (totem-pole), asserted when VDD reaches 1 V or SENSE is below threshold, rated for 2 mA high or low output current. |
| 6 | RESET | output | Active-high reset output (totem-pole) with 2 mA recommended output current, which is the complement of the active-low reset output. |
| 7 | SENSE | input | Voltage-sense input compared to the negative-going threshold (1.1 V typ for TLC7701, set by two external resistors), absolute maximum input range -0.3 to 7 V. |
| 8 | VDD | power_in | Supply voltage input, recommended operating range 2 V to 6 V with 7 V absolute maximum, and a 0.1 µF ceramic bypass capacitor recommended nearby. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-8 |
| Category | Power Supply Chip |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TLC7701QPWR`
- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `tlc7701qpwr-etched.step` / `tlc7701qpwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc7701qpwr.step` / `tlc7701qpwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc77) (38 pp, sha256 `3147b2830d2531af`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlc7701qpwr-datasheet.pdf)