component
TLC7135CDW
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "Texas Instruments Analog To Digital Converters (ADC), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component": {
"mpn": "TLC7135CDW",
"manufacturer": "Texas Instruments",
"package": "SOIC-28-300mil",
"pin_count": 28,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
"datasheet": "https://www.ti.com/cn/lit/gpn/tlc7135",
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"distributor_links": {
"lcsc": "C1549780",
"digikey": "2156-TLC7135CDW-ND",
"mouser": "595-TLC7135CDW"
},
"distributor_check": {
"checked_at": "2026-10-06T03:54:40Z",
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"pins": [
{
"number": "1",
"name": "VCC−",
"type": "power_in",
"description": "Negative power supply rail, −3 to −8 V recommended operating range."
},
{
"number": "2",
"name": "REF",
"type": "input",
"description": "Reference voltage input, nominally 1 V, positive relative to ANLG COMMON."
},
{
"number": "3",
"name": "ANLG COMMON",
"type": "power_in",
"description": "Analog circuit common reference, establishes baseline for analog measurements."
},
{
"number": "4",
"name": "INT OUT",
"type": "output",
"description": "Integrator output voltage, ranges ±3.5 to ±4 V during conversion cycle."
},
{
"number": "5",
"name": "AUTO ZERO",
"type": "input",
"description": "Auto-zero mode control signal for input buffer offset compensation."
},
{
"number": "6",
"name": "BUFF OUT",
"type": "output",
"description": "Buffer amplifier output connected to integrator input."
},
{
"number": "7",
"name": "Cref−",
"type": "passive",
"description": "Negative terminal of reference capacitor, typically 1 µF polypropylene."
},
{
"number": "8",
"name": "Cref+",
"type": "passive",
"description": "Positive terminal of reference capacitor, typically 1 µF polypropylene."
},
{
"number": "9",
"name": "IN−",
"type": "input",
"description": "Differential analog input negative terminal, voltage range VCC− +1 V to VCC+ −0.5 V."
},
{
"number": "10",
"name": "IN+",
"type": "input",
"description": "Differential analog input positive terminal, voltage range VCC− +1 V to VCC+ −0.5 V."
},
{
"number": "11",
"name": "VCC+",
"type": "power_in",
"description": "Positive power supply rail, +4 to +6 V recommended operating range."
},
{
"number": "12",
"name": "D5",
"type": "output",
"description": "Most significant digit drive output for tens-of-thousands digit, active high for 200 clock pulses per digit."
},
{
"number": "13",
"name": "B1",
"type": "output",
"description": "Binary-coded-decimal output bit 1 (LSB), multiplexed with other BCD bits under STROBE control."
},
{
"number": "14",
"name": "B2",
"type": "output",
"description": "Binary-coded-decimal output bit 2, multiplexed with other BCD bits under STROBE control."
},
{
"number": "15",
"name": "B4",
"type": "output",
"description": "Binary-coded-decimal output bit 4, multiplexed with other BCD bits under STROBE control."
},
{
"number": "16",
"name": "B8",
"type": "output",
"description": "Binary-coded-decimal output bit 8 (MSB), multiplexed with other BCD bits under STROBE control."
},
{
"number": "17",
"name": "D4",
"type": "output",
"description": "Digit drive output for thousands digit, active high for 200 clock pulses per digit."
},
{
"number": "18",
"name": "D3",
"type": "output",
"description": "Digit drive output for hundreds digit, active high for 200 clock pulses per digit."
},
{
"number": "19",
"name": "D2",
"type": "output",
"description": "Digit drive output for tens digit, active high for 200 clock pulses per digit."
},
{
"number": "20",
"name": "D1",
"type": "output",
"description": "Least significant digit drive output for units digit, active high for 200 clock pulses per digit."
},
{
"number": "21",
"name": "BUSY",
"type": "output",
"description": "Busy output signal, high during signal integrate and deintegrate phases, TTL-compatible."
},
{
"number": "22",
"name": "CLK",
"type": "input",
"description": "Clock input, TTL-compatible, frequency range 0 Hz to 2 MHz, VIH = 2.8 V, VIL = 0.8 V."
},
{
"number": "23",
"name": "POLARITY",
"type": "output",
"description": "Polarity output, high for positive input signal, low for negative, updates at deintegrate phase."
},
{
"number": "24",
"name": "DGTL GND",
"type": "power_in",
"description": "Digital circuit ground return, separate from analog ground to minimize noise coupling."
},
{
"number": "25",
"name": "RUN/HOLD",
"type": "input",
"description": "Run/Hold control input, TTL-compatible, low level initiates hold mode, positive pulse restarts measurement."
},
{
"number": "26",
"name": "STROBE",
"type": "input",
"description": "Strobe input, negative-going pulses transfer BCD conversion data to external latches or microprocessors."
},
{
"number": "27",
"name": "OVER RANGE",
"type": "output",
"description": "Over-range output signal, goes high when magnitude of differential input exceeds ±2 × Vref."
},
{
"number": "28",
"name": "UNDER RANGE",
"type": "output",
"description": "Under-range output signal, goes high when conversion result ≤ 1800 counts (9% of 20,000 count full-scale)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [],
"pages_sent": 17,
"cost_usd": 0.1935,
"at": "2026-10-06T03:54:22"
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"url": "https://www.ti.com/cn/lit/gpn/tlc7135",
"pages": 17,
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"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
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