component

TLC7135CDW

Public Made by Adom

by adom

Texas Instruments Analog To Digital Converters (ADC), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata acquisitiontlc7135cdwfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

TLC7135CDW

Texas Instruments · Analog To Digital Converters (ADC) · SOIC-28-300mil

TLC7135CDW from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC− power_in Negative power supply rail, −3 to −8 V recommended operating range.
2 REF input Reference voltage input, nominally 1 V, positive relative to ANLG COMMON.
3 ANLG COMMON power_in Analog circuit common reference, establishes baseline for analog measurements.
4 INT OUT output Integrator output voltage, ranges ±3.5 to ±4 V during conversion cycle.
5 AUTO ZERO input Auto-zero mode control signal for input buffer offset compensation.
6 BUFF OUT output Buffer amplifier output connected to integrator input.
7 Cref− passive Negative terminal of reference capacitor, typically 1 µF polypropylene.
8 Cref+ passive Positive terminal of reference capacitor, typically 1 µF polypropylene.
9 IN− input Differential analog input negative terminal, voltage range VCC− +1 V to VCC+ −0.5 V.
10 IN+ input Differential analog input positive terminal, voltage range VCC− +1 V to VCC+ −0.5 V.
11 VCC+ power_in Positive power supply rail, +4 to +6 V recommended operating range.
12 D5 output Most significant digit drive output for tens-of-thousands digit, active high for 200 clock pulses per digit.
13 B1 output Binary-coded-decimal output bit 1 (LSB), multiplexed with other BCD bits under STROBE control.
14 B2 output Binary-coded-decimal output bit 2, multiplexed with other BCD bits under STROBE control.
15 B4 output Binary-coded-decimal output bit 4, multiplexed with other BCD bits under STROBE control.
16 B8 output Binary-coded-decimal output bit 8 (MSB), multiplexed with other BCD bits under STROBE control.
17 D4 output Digit drive output for thousands digit, active high for 200 clock pulses per digit.
18 D3 output Digit drive output for hundreds digit, active high for 200 clock pulses per digit.
19 D2 output Digit drive output for tens digit, active high for 200 clock pulses per digit.
20 D1 output Least significant digit drive output for units digit, active high for 200 clock pulses per digit.
21 BUSY output Busy output signal, high during signal integrate and deintegrate phases, TTL-compatible.
22 CLK input Clock input, TTL-compatible, frequency range 0 Hz to 2 MHz, VIH = 2.8 V, VIL = 0.8 V.
23 POLARITY output Polarity output, high for positive input signal, low for negative, updates at deintegrate phase.
24 DGTL GND power_in Digital circuit ground return, separate from analog ground to minimize noise coupling.
25 RUN/HOLD input Run/Hold control input, TTL-compatible, low level initiates hold mode, positive pulse restarts measurement.
26 STROBE input Strobe input, negative-going pulses transfer BCD conversion data to external latches or microprocessors.
27 OVER RANGE output Over-range output signal, goes high when magnitude of differential input exceeds ±2 × Vref.
28 UNDER RANGE output Under-range output signal, goes high when conversion result ≤ 1800 counts (9% of 20,000 count full-scale).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-28-300mil
Category Data Acquisition
Pins 28

CAD (KiCad official)

  • Symbol: TLC7135CDW
  • Footprint: Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm
  • 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
  • 3D model files: tlc7135cdw-etched.step / tlc7135cdw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc7135cdw.step / tlc7135cdw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (17 pp, sha256 89de1bb2c0ac6ea0, retrieved 2026-10-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF