TLC5628CDWR

{
  "schema_version": 1,
  "type": "component",
  "slug": "tlc5628cdwr",
  "title": "TLC5628CDWR",
  "brief": "Texas Instruments Digital To Analog Converters (DAC), SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "data acquisition",
    "tlc5628cdwr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "TLC5628CDWR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16-300mil",
    "pin_count": 16,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tlc5628",
    "parts": {
      "symbol": "tlc5628cdwr.kicad_sym",
      "footprint": "tlc5628cdwr.kicad_mod",
      "model_3d": "tlc5628cdwr-hero.glb",
      "model_3d_plain": "tlc5628cdwr.glb",
      "model_3d_step": "tlc5628cdwr-etched.step",
      "model_3d_step_plain": "tlc5628cdwr.step",
      "lbr": "tlc5628cdwr.lbr"
    },
    "distributor_links": {
      "lcsc": "C544395",
      "digikey": "TLC5628CDWR-ND",
      "mouser": "595-TLC5628CDWR"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T23:17:19Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "TLC5628CDWR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TLC5628CDWR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DACB",
        "type": "output",
        "description": "DAC B analog voltage output, buffered with a range of 1x or 2x the REF1 reference voltage set by the RNG bit, with GND as the low end."
      },
      {
        "number": "2",
        "name": "DACA",
        "type": "output",
        "description": "DAC A analog voltage output, buffered with a range of 1x or 2x the REF1 reference voltage set by the RNG bit, with GND as the low end."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground return and reference terminal for the device and the DAC outputs."
      },
      {
        "number": "4",
        "name": "DATA",
        "type": "input",
        "description": "Serial interface data input; each bit is clocked into the serial register on the falling edge of CLK, MSB first."
      },
      {
        "number": "5",
        "name": "CLK",
        "type": "input",
        "description": "Serial interface clock; input data is shifted into the serial register on its falling edge (1 MHz maximum CLK frequency)."
      },
      {
        "number": "6",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage, 4.75 V to 5.25 V recommended operating range."
      },
      {
        "number": "7",
        "name": "DACE",
        "type": "output",
        "description": "DAC E analog voltage output, buffered with a range of 1x or 2x the REF2 reference voltage set by the RNG bit, with GND as the low end."
      },
      {
        "number": "8",
        "name": "DACF",
        "type": "output",
        "description": "DAC F analog voltage output, buffered with a range of 1x or 2x the REF2 reference voltage set by the RNG bit, with GND as the low end."
      },
      {
        "number": "9",
        "name": "DACG",
        "type": "output",
        "description": "DAC G analog voltage output, buffered with a range of 1x or 2x the REF2 reference voltage set by the RNG bit, with GND as the low end."
      },
      {
        "number": "10",
        "name": "DACH",
        "type": "output",
        "description": "DAC H analog voltage output, buffered with a range of 1x or 2x the REF2 reference voltage set by the RNG bit, with GND as the low end."
      },
      {
        "number": "11",
        "name": "REF2",
        "type": "input",
        "description": "Reference voltage input for DACs E through H, which defines their analog output range (high-impedance buffered input; Vref specified from VDD-1.5 V down to the 2 V test condition in the datasheet, with reference input voltage range GND - 0.3 V to VDD + 0.3 V)."
      },
      {
        "number": "12",
        "name": "LOAD",
        "type": "input",
        "description": "Serial interface load control; when LDAC is low, the falling edge of LOAD latches the serial data into the output latch and updates the DAC output (LOAD pulse width at least 250 ns)."
      },
      {
        "number": "13",
        "name": "LDAC",
        "type": "input",
        "description": "Load DAC control; when high, DAC outputs do not update on serial load, and outputs update only on a high-to-low transition of LDAC."
      },
      {
        "number": "14",
        "name": "REF1",
        "type": "input",
        "description": "Reference voltage input for DACs A through D, which defines their analog output range (high-impedance buffered input; reference input voltage range GND - 0.3 V to VDD + 0.3 V)."
      },
      {
        "number": "15",
        "name": "DACD",
        "type": "output",
        "description": "DAC D analog voltage output, buffered with a range of 1x or 2x the REF1 reference voltage set by the RNG bit, with GND as the low end."
      },
      {
        "number": "16",
        "name": "DACC",
        "type": "output",
        "description": "DAC C analog voltage output, buffered with a range of 1x or 2x the REF1 reference voltage set by the RNG bit, with GND as the low end."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet's terminal table classifies VDD as 'I' (input); it is typed power_in here because it i; The text extraction of the pin diagram lost the left-to-right ordering of pins 9-16. Their numbers a; The datasheet specifies Vref per DAC group as VDD–1.5 V (recommended) and the reference input voltag"
        ],
        "pages_sent": 18,
        "cost_usd": 0.0801,
        "at": "2026-10-11T23:17:04"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tlc5628",
        "pages": 18,
        "sha256": "4f2b294849b20fc9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tlc5628cdwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tlc5628cdwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "b94f60a003ca49f55ee74c7311bdd29baabdb2c255dab0da5281607abfbf4cd3",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-16-300mil",
      "Category": "Data Acquisition",
      "Pins": "16"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "tlc5628cdwr"
  ],
  "discovery_pitch": "TLC5628CDWR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tlc5628cdwr.kicad_sym",
    "tlc5628cdwr.kicad_mod",
    "tlc5628cdwr.glb",
    "tlc5628cdwr.step",
    "tlc5628cdwr.lbr",
    "docs/hero.png",
    "docs/tlc5628cdwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tlc5628cdwr-hero.glb",
    "tlc5628cdwr-hero.overlay.json"
  ],
  "visibility": {
    "public": true
  }
}