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TLC5628CDWR

Public Made by Adom

by adom

Texas Instruments Digital To Analog Converters (DAC), SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLC5628CDWR

Texas Instruments · Digital To Analog Converters (DAC) · SOIC-16-300mil

TLC5628CDWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DACB output DAC B analog voltage output, buffered with a range of 1x or 2x the REF1 reference voltage set by the RNG bit, with GND as the low end.
2 DACA output DAC A analog voltage output, buffered with a range of 1x or 2x the REF1 reference voltage set by the RNG bit, with GND as the low end.
3 GND power_in Ground return and reference terminal for the device and the DAC outputs.
4 DATA input Serial interface data input; each bit is clocked into the serial register on the falling edge of CLK, MSB first.
5 CLK input Serial interface clock; input data is shifted into the serial register on its falling edge (1 MHz maximum CLK frequency).
6 VDD power_in Positive supply voltage, 4.75 V to 5.25 V recommended operating range.
7 DACE output DAC E analog voltage output, buffered with a range of 1x or 2x the REF2 reference voltage set by the RNG bit, with GND as the low end.
8 DACF output DAC F analog voltage output, buffered with a range of 1x or 2x the REF2 reference voltage set by the RNG bit, with GND as the low end.
9 DACG output DAC G analog voltage output, buffered with a range of 1x or 2x the REF2 reference voltage set by the RNG bit, with GND as the low end.
10 DACH output DAC H analog voltage output, buffered with a range of 1x or 2x the REF2 reference voltage set by the RNG bit, with GND as the low end.
11 REF2 input Reference voltage input for DACs E through H, which defines their analog output range (high-impedance buffered input; Vref specified from VDD-1.5 V down to the 2 V test condition in the datasheet, with reference input voltage range GND - 0.3 V to VDD + 0.3 V).
12 LOAD input Serial interface load control; when LDAC is low, the falling edge of LOAD latches the serial data into the output latch and updates the DAC output (LOAD pulse width at least 250 ns).
13 LDAC input Load DAC control; when high, DAC outputs do not update on serial load, and outputs update only on a high-to-low transition of LDAC.
14 REF1 input Reference voltage input for DACs A through D, which defines their analog output range (high-impedance buffered input; reference input voltage range GND - 0.3 V to VDD + 0.3 V).
15 DACD output DAC D analog voltage output, buffered with a range of 1x or 2x the REF1 reference voltage set by the RNG bit, with GND as the low end.
16 DACC output DAC C analog voltage output, buffered with a range of 1x or 2x the REF1 reference voltage set by the RNG bit, with GND as the low end.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: TLC5628CDWR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: tlc5628cdwr-etched.step / tlc5628cdwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc5628cdwr.step / tlc5628cdwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 4f2b294849b20fc9, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF