TLC5510IPW

{
  "slug": "tlc5510ipw",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Analog To Digital Converters (ADC), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "tlc5510ipw",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tlc5510ipw.kicad_sym",
    "tlc5510ipw.kicad_mod",
    "tlc5510ipw.glb",
    "tlc5510ipw.step",
    "tlc5510ipw.lbr",
    "docs/hero.png",
    "docs/tlc5510ipw-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tlc5510ipw-hero.glb",
    "tlc5510ipw-hero.overlay.json"
  ],
  "component": {
    "mpn": "TLC5510IPW",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-24",
    "pin_count": 24,
    "category": "Data Acquisition",
    "subcategory": "Analog To Digital Converters (ADC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tlc5510",
    "parts": {
      "symbol": "tlc5510ipw.kicad_sym",
      "footprint": "tlc5510ipw.kicad_mod",
      "model_3d": "tlc5510ipw-hero.glb",
      "model_3d_plain": "tlc5510ipw.glb",
      "model_3d_step": "tlc5510ipw-etched.step",
      "model_3d_step_plain": "tlc5510ipw.step",
      "lbr": "tlc5510ipw.lbr"
    },
    "distributor_links": {
      "lcsc": "C1542825",
      "digikey": "2156-TLC5510IPW-ND",
      "mouser": "595-TLC5510IPW"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T14:36:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "2156-TLC5510IPW-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TLC5510IPW",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "OE",
        "type": "input",
        "description": "Output enable: when OE is low the data outputs D1-D8 are enabled, and when OE is high D1-D8 are placed in the high-impedance state."
      },
      {
        "number": "2",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground; AGND and DGND are connected internally, so the ground lead must be kept as noise free as possible."
      },
      {
        "number": "3",
        "name": "D1",
        "type": "output",
        "description": "Digital data output, D1 is the LSB of the 8-bit output code."
      },
      {
        "number": "4",
        "name": "D2",
        "type": "output",
        "description": "Digital data output, bit 2 of the 8-bit output code."
      },
      {
        "number": "5",
        "name": "D3",
        "type": "output",
        "description": "Digital data output, bit 3 of the 8-bit output code."
      },
      {
        "number": "6",
        "name": "D4",
        "type": "output",
        "description": "Digital data output, bit 4 of the 8-bit output code."
      },
      {
        "number": "7",
        "name": "D5",
        "type": "output",
        "description": "Digital data output, bit 5 of the 8-bit output code."
      },
      {
        "number": "8",
        "name": "D6",
        "type": "output",
        "description": "Digital data output, bit 6 of the 8-bit output code."
      },
      {
        "number": "9",
        "name": "D7",
        "type": "output",
        "description": "Digital data output, bit 7 of the 8-bit output code."
      },
      {
        "number": "10",
        "name": "D8 (MSB)",
        "type": "output",
        "description": "Digital data output, D8 is the MSB of the 8-bit output code."
      },
      {
        "number": "11",
        "name": "VDDD",
        "type": "power_in",
        "description": "Digital supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND."
      },
      {
        "number": "12",
        "name": "CLK",
        "type": "input",
        "description": "Clock input; VIH minimum 4 V, VIL maximum 1 V, and clock high and low pulse durations of at least 25 ns each."
      },
      {
        "number": "13",
        "name": "VDDD",
        "type": "power_in",
        "description": "Digital supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND."
      },
      {
        "number": "14",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND."
      },
      {
        "number": "15",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND."
      },
      {
        "number": "16",
        "name": "REFTS",
        "type": "passive",
        "description": "Reference voltage top sense; shorted to REFT for the TLC5510 2-V internal divider and connected to VDDA for the TLC5510A."
      },
      {
        "number": "17",
        "name": "REFT",
        "type": "input",
        "description": "Reference voltage top; for the TLC5510A it is externally applied between VREFB+2 V and 4 V, and for the TLC5510 it is generated internally by the divider."
      },
      {
        "number": "18",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND."
      },
      {
        "number": "19",
        "name": "ANALOG IN",
        "type": "input",
        "description": "Analog input whose voltage range is VREFB to VREFT (2 V full scale for TLC5510, 4 V full scale for TLC5510A)."
      },
      {
        "number": "20",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground, which should be tied to the analog ground plane."
      },
      {
        "number": "21",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground, which should be tied to the analog ground plane."
      },
      {
        "number": "22",
        "name": "REFBS",
        "type": "passive",
        "description": "Reference voltage bottom sense; shorted to REFB for the TLC5510 2-V internal divider and connected to ground for the TLC5510A."
      },
      {
        "number": "23",
        "name": "REFB",
        "type": "input",
        "description": "Reference voltage bottom; for the TLC5510A it is grounded or externally set between 0 V and VREFT-4 V, and for the TLC5510 it is generated internally by the divider."
      },
      {
        "number": "24",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground; AGND and DGND are connected internally, so the ground lead must be kept as noise free as possible."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet's Terminal Functions table gives no I/O direction for REFTS and REFBS (blank I/O colum; Pin 17 (REFT) and pin 23 (REFB) are marked 'I' in the datasheet, but for the TLC5510 they are intern; The pinout was assembled from the top-view figure text, whose names are listed out of order in the e"
        ],
        "pages_sent": 22,
        "cost_usd": 0.0897,
        "at": "2026-10-08T14:36:04"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tlc5510",
        "pages": 22,
        "sha256": "342cbda59fa98fd6",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 24,
        "described": 24,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tlc5510ipw.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          7.8,
          0.97
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "706322f42d9793ebf28d5b80100a68bfa8769998a00b78acadf7af937fc1454f",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tlc5510ipw-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          7.8,
          0.97
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ce0a907d8d318aed0be38fa2df44b0aaacdf957e2f5daafcbc0a19a755a50008",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}