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TLC5510IPW
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLC5510IPW
Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-24
TLC5510IPW from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output enable: when OE is low the data outputs D1-D8 are enabled, and when OE is high D1-D8 are placed in the high-impedance state. |
| 2 | DGND | power_in | Digital ground; AGND and DGND are connected internally, so the ground lead must be kept as noise free as possible. |
| 3 | D1 | output | Digital data output, D1 is the LSB of the 8-bit output code. |
| 4 | D2 | output | Digital data output, bit 2 of the 8-bit output code. |
| 5 | D3 | output | Digital data output, bit 3 of the 8-bit output code. |
| 6 | D4 | output | Digital data output, bit 4 of the 8-bit output code. |
| 7 | D5 | output | Digital data output, bit 5 of the 8-bit output code. |
| 8 | D6 | output | Digital data output, bit 6 of the 8-bit output code. |
| 9 | D7 | output | Digital data output, bit 7 of the 8-bit output code. |
| 10 | D8 (MSB) | output | Digital data output, D8 is the MSB of the 8-bit output code. |
| 11 | VDDD | power_in | Digital supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND. |
| 12 | CLK | input | Clock input; VIH minimum 4 V, VIL maximum 1 V, and clock high and low pulse durations of at least 25 ns each. |
| 13 | VDDD | power_in | Digital supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND. |
| 14 | VDDA | power_in | Analog supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND. |
| 15 | VDDA | power_in | Analog supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND. |
| 16 | REFTS | passive | Reference voltage top sense; shorted to REFT for the TLC5510 2-V internal divider and connected to VDDA for the TLC5510A. |
| 17 | REFT | input | Reference voltage top; for the TLC5510A it is externally applied between VREFB+2 V and 4 V, and for the TLC5510 it is generated internally by the divider. |
| 18 | VDDA | power_in | Analog supply voltage, 4.75 V to 5.25 V (nominal 5 V) referenced to AGND. |
| 19 | ANALOG IN | input | Analog input whose voltage range is VREFB to VREFT (2 V full scale for TLC5510, 4 V full scale for TLC5510A). |
| 20 | AGND | power_in | Analog ground, which should be tied to the analog ground plane. |
| 21 | AGND | power_in | Analog ground, which should be tied to the analog ground plane. |
| 22 | REFBS | passive | Reference voltage bottom sense; shorted to REFB for the TLC5510 2-V internal divider and connected to ground for the TLC5510A. |
| 23 | REFB | input | Reference voltage bottom; for the TLC5510A it is grounded or externally set between 0 V and VREFT-4 V, and for the TLC5510 it is generated internally by the divider. |
| 24 | DGND | power_in | Digital ground; AGND and DGND are connected internally, so the ground lead must be kept as noise free as possible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-24 |
| Category | Data Acquisition |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
TLC5510IPW - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
tlc5510ipw-etched.step/tlc5510ipw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc5510ipw.step/tlc5510ipw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
342cbda59fa98fd6, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).