# TLC0834CDR

**Texas Instruments** · Analog To Digital Converters (ADC) · SOIC-14

TLC0834CDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection. |
| 2 | CS | input | Chip select; set low to enable all logic circuits and hold low for the complete conversion, and a high level clears the internal registers and puts the outputs in high impedance. |
| 3 | CH0 | input | Analog multiplexer input channel 0, usable single-ended or as a differential pair with CH1, with input range -0.3 V to VCC + 0.3 V. |
| 4 | CH1 | input | Analog multiplexer input channel 1, usable single-ended or as a differential pair with CH0, with input range -0.3 V to VCC + 0.3 V. |
| 5 | CH2 | input | Analog multiplexer input channel 2, usable single-ended or as a differential pair with CH3, with input range -0.3 V to VCC + 0.3 V. |
| 6 | CH3 | input | Analog multiplexer input channel 3, usable single-ended or as a differential pair with CH2, with input range -0.3 V to VCC + 0.3 V. |
| 7 | DGTL GND | power_in | Digital ground terminal, the reference for the network ground voltages. |
| 8 | ANLG GND | power_in | Analog ground terminal. |
| 9 | REF | input | Voltage reference input with 1.3 to 5.9 kΩ input resistance, adjustable to encode a smaller analog span to the full 8 bits (5 V reference typical). |
| 10 | DO | tri_state | Serial data output that shifts out the conversion result MSB first then LSB first, high-impedance when CS is high. |
| 11 | SARS | tri_state | SAR status output that goes high while a conversion is in progress and low after eight clock periods, high-impedance when CS is high. |
| 12 | CLK | input | Clock input from the processor with recommended frequency 10 kHz to 600 kHz and 40% to 60% duty cycle; DI is latched on each low-to-high transition. |
| 13 | DI | input | Serial data input that shifts the start bit and multiplexer address word into the converter on CLK rising edges, with TTL/MOS-compatible levels (VIH 2 V min, VIL 0.8 V max). |
| 14 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended (5 V nominal), 6.5 V absolute maximum. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Data Acquisition |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `TLC0834CDR`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `tlc0834cdr-etched.step` / `tlc0834cdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc0834cdr.step` / `tlc0834cdr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc0838) (19 pp, sha256 `7da8a03a60087fd9`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlc0834cdr-datasheet.pdf)