TLC0831CP

Texas Instruments · Analog To Digital Converters (ADC) · PDIP-8

TLC0831CP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS	input	Chip select, active low: a conversion starts when CS goes low and CS must be held low for the complete conversion; when CS goes high, internal registers clear and DO returns to high impedance, with CS high pulse duration of at least 220 ns.
2	IN+	input	Positive analog input, which is compared to IN- (or to ground in single-ended use with IN- grounded), with the common-mode input voltage specified from -0.05 V to VCC+0.05 V.
3	IN-	input	Negative analog input, and the digital output code is 0000 0000 when IN- is more positive than IN+.
4	GND	power_in	Network ground terminal, to which all voltages except differential voltages are referenced.
5	REF	input	Voltage reference input with input resistance of 1.3 kΩ min, 2.4 kΩ typ, 5.9 kΩ max, typically set equal to VCC for ratiometric operation.
6	DO	tri_state	Serial data output that delivers the conversion MSB first and is high impedance when CS is high, with MSB-first propagation delay after CLK↑ of 650 ns typ and 1500 ns max at 100 pF.
7	CLK	input	Serial clock input, with recommended clock frequency of 10 kHz to 600 kHz and clock duty cycle of 40% to 60%.
8	VCC	power_in	Supply voltage, recommended 4.5 V min, 5 V nom, 5.5 V max, with absolute maximum of 6.5 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-8
Category	Data Acquisition
Pins	8

CAD (KiCad official)

Symbol: TLC0831CP
Footprint: Package_DIP:DIP-8_W7.62mm
3D model: PDIP-8 (KiCad packages3D, STEP)
3D model files: tlc0831cp-etched.step / tlc0831cp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc0831cp.step / tlc0831cp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (21 pp, sha256 0af85a1e9ea62978, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TLC0831CP

**Texas Instruments** · Analog To Digital Converters (ADC) · PDIP-8

TLC0831CP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip select, active low: a conversion starts when CS goes low and CS must be held low for the complete conversion; when CS goes high, internal registers clear and DO returns to high impedance, with CS high pulse duration of at least 220 ns. |
| 2 | IN+ | input | Positive analog input, which is compared to IN- (or to ground in single-ended use with IN- grounded), with the common-mode input voltage specified from -0.05 V to VCC+0.05 V. |
| 3 | IN- | input | Negative analog input, and the digital output code is 0000 0000 when IN- is more positive than IN+. |
| 4 | GND | power_in | Network ground terminal, to which all voltages except differential voltages are referenced. |
| 5 | REF | input | Voltage reference input with input resistance of 1.3 kΩ min, 2.4 kΩ typ, 5.9 kΩ max, typically set equal to VCC for ratiometric operation. |
| 6 | DO | tri_state | Serial data output that delivers the conversion MSB first and is high impedance when CS is high, with MSB-first propagation delay after CLK↑ of 650 ns typ and 1500 ns max at 100 pF. |
| 7 | CLK | input | Serial clock input, with recommended clock frequency of 10 kHz to 600 kHz and clock duty cycle of 40% to 60%. |
| 8 | VCC | power_in | Supply voltage, recommended 4.5 V min, 5 V nom, 5.5 V max, with absolute maximum of 6.5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-8 |
| Category | Data Acquisition |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `TLC0831CP`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files: `tlc0831cp-etched.step` / `tlc0831cp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc0831cp.step` / `tlc0831cp.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc0831) (21 pp, sha256 `0af85a1e9ea62978`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlc0831cp-datasheet.pdf)