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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	28d ago
viewers	tl7726idr: viewers · Ray	28d ago
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page.json	Set visibility: public · Ray	28d ago
README.md	Publish 0.1.0 · Ray	28d ago
tl7726idr-etched.glb	tl7726idr: factory component page (tier=mfr) · Ray	28d ago
tl7726idr-etched.step	tl7726idr: factory component page (tier=mfr) · Ray	28d ago
tl7726idr-hero.glb	tl7726idr: hero GLB from the etched model (keeps the MPN mark) · Ray	28d ago
tl7726idr-hero.overlay.json	Publish 0.1.0 · Ray	28d ago
tl7726idr.glb	Publish 0.1.0 · Ray	28d ago
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tl7726idr.kicad_sym	Publish 0.1.0 · Ray	28d ago
tl7726idr.lbr	Publish 0.1.0 · Ray	28d ago
tl7726idr.step	Publish 0.1.0 · Ray	28d ago

TL7726IDR

Texas Instruments · Supervisor And Reset ICs · SOIC-8

TL7726IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground reference for the six clamping circuits; each clamp is active when VI < GND, and input clamping current is specified down to -25 mA when VI ≤ GND.
2	CLAMP	input	Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF.
3	CLAMP	input	Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF.
4	CLAMP	input	Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF.
5	CLAMP	input	Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF.
6	CLAMP	input	Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF.
7	CLAMP	input	Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF.
8	REF	input	Reference voltage input that sets the clamping threshold, specified at 4.5 V to 5.5 V in the recommended operating conditions and absolutely rated at 6 V maximum.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Power Management (PMIC)
Pins	8

CAD (KiCad official)

Symbol: TL7726IDR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: tl7726idr-etched.step / tl7726idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl7726idr.step / tl7726idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (14 pp, sha256 a5773b5c0120d44c, retrieved 2026-10-11, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF