component
TL7726IDR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTL7726IDR
Texas Instruments · Supervisor And Reset ICs · SOIC-8
TL7726IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the six clamping circuits; each clamp is active when VI < GND, and input clamping current is specified down to -25 mA when VI ≤ GND. |
| 2 | CLAMP | input | Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF. |
| 3 | CLAMP | input | Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF. |
| 4 | CLAMP | input | Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF. |
| 5 | CLAMP | input | Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF. |
| 6 | CLAMP | input | Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF. |
| 7 | CLAMP | input | Clamping circuit input that monitors the input voltage: between GND and REF it presents a very high impedance with input current under 10 µA, and it sinks up to 25 mA when VI < GND or VI > REF. |
| 8 | REF | input | Reference voltage input that sets the clamping threshold, specified at 4.5 V to 5.5 V in the recommended operating conditions and absolutely rated at 6 V maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TL7726IDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tl7726idr-etched.step/tl7726idr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tl7726idr.step/tl7726idr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (14 pp, sha256
a5773b5c0120d44c, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).