component
TL071CDR
Public Made by Adomby adom
Texas Instruments FET InputAmplifiers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
tl071cdr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body wi…
518a3dd
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{
"schema_version": 1,
"type": "component",
"slug": "tl071cdr",
"title": "TL071CDR",
"brief": "Texas Instruments FET InputAmplifiers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"op-amp-cmp",
"tl071cdr"
],
"component": {
"mpn": "TL071CDR",
"manufacturer": "Texas Instruments",
"package": "SOIC-8",
"pin_count": 8,
"category": "Op-amp/Cmp",
"subcategory": "FET InputAmplifiers",
"datasheet": "https://www.ti.com/lit/ds/symlink/tl071c.pdf",
"parts": {
"symbol": "tl071cdr.kicad_sym",
"footprint": "tl071cdr.kicad_mod",
"model_3d": "tl071cdr-etched.glb",
"model_3d_plain": "tl071cdr.glb",
"model_3d_step": "tl071cdr-etched.step",
"model_3d_step_plain": "tl071cdr.step",
"lbr": "tl071cdr.lbr"
},
"distributor_links": {
"lcsc": "C14449"
},
"pins": [
{
"number": "1",
"name": "OFFSET N1",
"type": "passive",
"description": "Offset null trim pin 1. Connect a potentiometer between OFFSET N1 (pin 1) and OFFSET N2 (pin 5) with the wiper tied to VCC- to trim the input offset voltage. Internal 1080 ohm resistors are tied here."
},
{
"number": "2",
"name": "IN-",
"type": "input",
"description": "Inverting op-amp input. JFET input stage provides very high input impedance (~10^12 ohm) and very low input bias current (~65 pA typ)."
},
{
"number": "3",
"name": "IN+",
"type": "input",
"description": "Non-inverting op-amp input. JFET input stage provides very high input impedance (~10^12 ohm) and very low input bias current (~65 pA typ). Common-mode range typically -12 V to +15 V on +/-15 V supplies."
},
{
"number": "4",
"name": "VCC-",
"type": "power_in",
"description": "Negative supply rail. Rated down to -18 V absolute maximum; typically operated at -15 V (dual supply) or GND (single supply)."
},
{
"number": "5",
"name": "OFFSET N2",
"type": "passive",
"description": "Offset null trim pin 2. Connect a potentiometer between OFFSET N1 (pin 1) and OFFSET N2 (pin 5) with the wiper tied to VCC- to trim the input offset voltage."
},
{
"number": "6",
"name": "OUT",
"type": "output",
"description": "Op-amp output. Short-circuit protected with unlimited short-circuit duration. Typical peak swing +/-13.5 V into 10 kOhm on +/-15 V supplies; unity-gain bandwidth 3 MHz, slew rate 13 V/us typ."
},
{
"number": "7",
"name": "VCC+",
"type": "power_in",
"description": "Positive supply rail. Rated up to +18 V absolute maximum; typically operated at +15 V (dual supply) or the single-supply rail. Supply current 1.4 mA typ."
},
{
"number": "8",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Leave floating or tie to any convenient net."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/tl071c.pdf",
"pages": 36,
"sha256": "13558f1741483f56",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "tl071cdr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tl071cdr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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"sha256": "21fe812ad9dd60644287ad7f4d0961506594614546b49bafbfc9ae100a8f1603",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "SOIC-8",
"Category": "Op-amp/Cmp",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"tl071cdr"
],
"discovery_pitch": "TL071CDR (Texas Instruments) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"tl071cdr.kicad_sym",
"tl071cdr.kicad_mod",
"tl071cdr.glb",
"tl071cdr.step",
"tl071cdr.lbr",
"docs/hero.png",
"docs/tl071cdr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"tl071cdr-etched.step"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "TL071CDR",
"kind": "packaging"
},
{
"mpn": "TL071CDRACD",
"kind": "packaging"
},
{
"mpn": "TL071CDRACDR",
"kind": "packaging"
},
{
"mpn": "TL071CDRBCD",
"kind": "packaging"
},
{
"mpn": "TL071CDRBCDR",
"kind": "packaging"
},
{
"mpn": "TL071CDRID",
"kind": "packaging"
},
{
"mpn": "TL071CDRIDR",
"kind": "packaging"
},
{
"mpn": "TL071CDRCP",
"kind": "packaging"
},
{
"mpn": "TL071CDRACP",
"kind": "packaging"
},
{
"mpn": "TL071CDRBCP",
"kind": "packaging"
},
{
"mpn": "TL071CDRIP",
"kind": "packaging"
},
{
"mpn": "TL071CDRCPSR",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T09:44:29.414Z"
}