component

TK560P60Y

Public Made by Adom

by adom

TOSHIBA MOSFETs, DPAK. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorstk560p60y
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tk560p60y: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers tk560p60y: viewers · Ray 27d ago
package.json Publish 0.1.0 · Ray 27d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md tk560p60y: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 15d ago
tk560p60y-etched.fit.json tk560p60y: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tk560p60y-etched.glb tk560p60y: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tk560p60y-etched.step tk560p60y: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tk560p60y.glb Publish 0.1.0 · Ray 27d ago
tk560p60y.kicad_mod Publish 0.1.0 · Ray 27d ago
tk560p60y.kicad_sym Publish 0.1.0 · Ray 27d ago
tk560p60y.lbr Publish 0.1.0 · Ray 27d ago
tk560p60y.step Publish 0.1.0 · Ray 27d ago

TK560P60Y

TOSHIBA · MOSFETs · DPAK

TK560P60Y from TOSHIBA, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate. Insulated MOS gate; controls channel conduction between drain and source. Absolute maximum VGSS = ±30 V; enhancement threshold Vth = 3 to 4 V (VDS = 10 V, ID = 0.24 mA). ESD sensitive.
2 D passive Drain. High-voltage terminal of the N-channel MOSFET, also connected to the tab (heat-sinking pad). Rated VDSS = 600 V, ID = 7 A (Tc = 25 °C), IDP = 28 A pulsed.
3 S passive Source. Return terminal of the N-channel MOSFET channel and cathode reference for the intrinsic body diode. Body diode VDSF ≈ -1.7 V max at IDR = 7 A.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package DPAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: TK560P60Y
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: tk560p60y-etched.step / tk560p60y-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tk560p60y.step / tk560p60y.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (None pp, sha256 62b9bc544751c7f3, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF