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THS7001IPWP

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Texas Instruments Operational Amplifier, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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THS7001IPWP

Texas Instruments · Operational Amplifier · HTSSOP-20-EP

THS7001IPWP from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin of the THS7001, shared by the PGA.
2 VREFPGA power_in Reference input of the programmable gain amplifier.
3 -VIN PGA input Inverting input of the inverting programmable gain amplifier (PGA IN−).
4 VOUTPre-AMP output Preamp output, accessible so external filtering or gain-setting resistors can be added between the preamp and the PGA.
5 -VIN Pre-Amp input Inverting input of the low-noise voltage-feedback preamp (1.7 nV/√Hz, minimum gain of 2 or −1).
6 +VINPre-Amp input Non-inverting input of the low-noise voltage-feedback preamp.
7 VCC- Pre-Amp power_in Negative supply of the preamp; the device operates from ±4.5 V to ±16 V supplies.
8 VCC+Pre-Amp power_in Positive supply of the preamp; the device operates from ±4.5 V to ±16 V supplies.
9 Spare/NC unconnected Spare pin, no connection.
10 Spare/NC unconnected Spare pin, no connection.
11 Spare/NC unconnected Spare pin, no connection.
12 VH input Positive output clamp level (CLAMP+) for the PGA output, preventing it from swinging outside the ADC common-mode input range.
13 VCC+PGA power_in Positive supply of the PGA; the device operates from ±4.5 V to ±16 V supplies.
14 VCC- PGA power_in Negative supply of the PGA; the device operates from ±4.5 V to ±16 V supplies.
15 VL input Negative output clamp level (CLAMP−) for the PGA output, preventing it from swinging outside the ADC common-mode input range.
16 VOUTPGA output Output of the programmable gain amplifier, with −22 dB to 20 dB gain range and high/low clamp protection.
17 SHDN input Shutdown control for power conservation and multiplexing.
18 G2 input Most significant bit of the TTL-compatible 3-bit PGA gain control (gain 2 to 20 dB when high).
19 G1 input Middle bit of the TTL-compatible 3-bit PGA gain control with 6 dB steps.
20 G0 input Least significant bit of the TTL-compatible 3-bit PGA gain control with 6 dB steps (000 = −22 dB, 111 = 20 dB).
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20-EP
Category Amplifiers
Pins 21

CAD (KiCad official)

  • Symbol: THS7001IPWP
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: ths7001ipwp-etched.step / ths7001ipwp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ths7001ipwp.step / ths7001ipwp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 8d73a37075d2c619, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF