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TCA9555RGER

Texas Instruments · I/O Expanders · VQFN-24-EP(4x4)

TCA9555RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P00 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
2 P01 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
3 P02 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
4 P03 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
5 P04 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
6 P05 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
7 P06 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
8 P07 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
9 GND power_in Ground. The exposed thermal pad, if used, must be connected as a secondary ground or left electrically open.
10 P10 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
11 P11 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
12 P12 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
13 P13 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
14 P14 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
15 P15 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
16 P16 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
17 P17 bidirectional P-port I/O with push-pull design structure, configured as an input at power on.
18 A0 input Address input 0. Connect directly to VCC or ground.
19 SCL input Serial clock bus. Connect to VCC through a pull-up resistor.
20 SDA bidirectional Serial data bus. Connect to VCC through a pull-up resistor.
21 VCC power_in Supply voltage. Recommended operating range is 1.65 V to 5.5 V.
22 INT output Interrupt output. Connect to VCC through a pull-up resistor.
23 A1 input Address input 1. Connect directly to VCC or ground.
24 A2 input Address input 2. Connect directly to VCC or ground.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Interface
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 1.65 5.5 V 5
High-level input voltage VIH 0.7 x VCC SCL, SDA; printed maximum is VCC 5
Low-level input voltage VIL 0.3 x VCC SCL, SDA 5
High-level input voltage VIH 5.5 V A2-A0, P07-P00, P17-P10 5
High-level output current IOH -10 mA P07-P00, P17-P10 5
Low-level output current IOL 25 mA P07-P00, P17-P10; Tj ≤ 65°C 5
Low-level output current IOL 18 mA P07-P00, P17-P10; Tj ≤ 85°C 5
Low-level output current IOL 11 mA P07-P00, P17-P10; Tj ≤ 100°C 5
Low-level output current IOL 6 mA INT, SDA; Tj ≤ 85°C 5
Low-level output current IOL 3.5 mA INT, SDA; Tj ≤ 100°C 5
Operating free-air temperature TA -40 85 °C 5
Supply voltage VCC -0.5 6 V 5
Input voltage VI -0.5 6 V 5
Output voltage VO -0.5 6 V 5
Input clamp current IIK -20 mA VI < 0 5
Output clamp current IOK -20 mA VO < 0 5
Input-output clamp current IIOK -20 20 mA VO < 0 or VO > VCC 5
Continuous output low current IOL 50 mA VO = 0 to VCC 5
Continuous output high current IOH -50 mA VO = 0 to VCC 5
Continuous current through GND ICC -250 mA Continuous current through GND 5
Continuous current through VCC ICC 160 mA Continuous current through VCC 5
Maximum junction temperature Tj(MAX) 100 °C 5
Storage temperature Tstg -65 150 °C 5
Input diode clamp voltage VIK -1.2 V II = -18 mA, VCC 1.65 V to 5.5 V 6
Power-on reset voltage, VCC rising VPORR 1.2 1.5 V VI = VCC or GND, IO = 0; VCC 1.65 V to 5.5 V 6
Power-on reset voltage, VCC falling VPORF 0.75 1 V VI = VCC or GND, IO = 0; VCC 1.65 V to 5.5 V 6
P-port high-level output voltage VOH 1.2 V IOH = -8 mA, VCC = 1.65 V 6
P-port high-level output voltage VOH 1.8 V IOH = -8 mA, VCC = 2.3 V 6
P-port high-level output voltage VOH 2.6 V IOH = -8 mA, VCC = 3 V 6
P-port high-level output voltage VOH 4.1 V IOH = -8 mA, VCC = 4.75 V 6
P-port high-level output voltage VOH 1 V IOH = -10 mA, VCC = 1.65 V 6
P-port high-level output voltage VOH 1.7 V IOH = -10 mA, VCC = 2.3 V 6
P-port high-level output voltage VOH 2.5 V IOH = -10 mA, VCC = 3 V 6
P-port high-level output voltage VOH 4 V IOH = -10 mA, VCC = 4.75 V 6
Low-level output current SDA IOL 3 mA SDA, VOL = 0.4 V; VCC 1.65 V to 5.5 V 6
Low-level output current P port IOL 8 mA P port, VOL = 0.5 V; VCC 1.65 V to 5.5 V 6
Low-level output current P port IOL 10 mA P port, VOL = 0.7 V; VCC 1.65 V to 5.5 V 6
Low-level output current INT IOL 3 mA INT, VOL = 0.4 V; VCC 1.65 V to 5.5 V 6
Input leakage current SCL, SDA II -1 1 µA SCL, SDA; VI = VCC or GND 6
Input leakage current A2-A0 II -1 1 µA A2-A0; VI = VCC or GND 6
Input high leakage current IIH 1 µA P port; VI = VCC 6
Input low leakage current IIL -100 µA P port; VI = GND 6
Input capacitance CI 3 8 pF SCL; VI = VCC or GND 6
Input-output pin capacitance Cio 3 9.5 pF SDA; VIO = VCC or GND 6
Input-output pin capacitance Cio 3.7 9.5 pF P port; VIO = VCC or GND 7
Quiescent current operating mode ICC 22 40 µA Operating mode, IO = 0, I/O = inputs, fSCL = 400 kHz, tr = 3 ns, No load; VCC = 5.5 V 7
Quiescent current operating mode ICC 5 11 µA Operating mode, IO = 0, I/O = inputs, fSCL = 400 kHz, tr = 3 ns, No load; VCC = 1.95 V 7
Quiescent current standby mode low inputs ICC 1.1 1.5 mA Standby mode, VI = GND, IO = 0, I/O = inputs, fSCL = 0 kHz, No load; VCC = 5.5 V 7
Quiescent current standby mode low inputs ICC 0.3 0.9 mA Standby mode, VI = GND, IO = 0, I/O = inputs, fSCL = 0 kHz, No load; VCC = 1.95 V 7
Quiescent current standby mode high inputs ICC 2.5 3.5 µA Standby mode, VI = VCC, IO = 0, I/O = inputs, fSCL = 0 kHz, No load; VCC = 5.5 V 7
Quiescent current standby mode high inputs ICC 0.5 1 µA Standby mode, VI = VCC, IO = 0, I/O = inputs, fSCL = 0 kHz, No load; VCC = 1.95 V 7
I2C clock frequency standard mode fscl 0 100 kHz I2C bus standard mode 7
I2C clock frequency fast mode fscl 0 400 kHz I2C bus fast mode 7
Interrupt valid time tiv 4 µs P port to INT 8
Output data valid tpv 200 ns SCL to P port; VCC = 2.3 V-5.5 V 8
Junction-to-ambient thermal resistance RθJA 48.4 °C/W RGE (VQFN) 24-pin package 6
Junction-to-case (top) thermal resistance RθJC(top) 58.1 °C/W RGE (VQFN) 24-pin package 6
Junction-to-board thermal resistance RθJB 27.1 °C/W RGE (VQFN) 24-pin package 6

CAD (KiCad official)

  • Symbol: TCA9555RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tca9555rger-etched.step / tca9555rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tca9555rger.step / tca9555rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 9706a3ccbf0bc915, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF