component
TC4420EOA713
Public Made by Adomby adom
Microchip Tech Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "tc4420eoa713",
"version": "0.1.0",
"type": "component",
"description": "Microchip Tech Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"motor driver ics",
"tc4420eoa713",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
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"files": [
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"README.md",
"tc4420eoa713.kicad_sym",
"tc4420eoa713.kicad_mod",
"tc4420eoa713.glb",
"tc4420eoa713.step",
"tc4420eoa713.lbr",
"docs/hero.png",
"docs/tc4420eoa713-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
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],
"component": {
"mpn": "TC4420EOA713",
"manufacturer": "Microchip Tech",
"package": "SOIC-8",
"pin_count": 8,
"category": "Motor Driver ICs",
"subcategory": "Gate Drivers",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588906639025561600",
"parts": {
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"footprint": "tc4420eoa713.kicad_mod",
"model_3d": "tc4420eoa713-hero.glb",
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"model_3d_step": "tc4420eoa713-etched.step",
"model_3d_step_plain": "tc4420eoa713.step",
"lbr": "tc4420eoa713.lbr"
},
"distributor_links": {
"lcsc": "C231865",
"digikey": "TC4420EOA713TR-ND",
"mouser": "579-TC4420EOA713"
},
"distributor_check": {
"checked_at": "2026-10-09T16:09:43Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "TC4420EOA713TR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "579-TC4420EOA713",
"status": "found"
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},
"pins": [
{
"number": "1",
"name": "VDD",
"type": "power_in",
"description": "Bias supply for the MOSFET driver, rated 4.5V to 18V with respect to the ground pins, and should be bypassed to ground with a local ceramic capacitor (minimum 1.0 µF suggested)."
},
{
"number": "2",
"name": "INPUT",
"type": "input",
"description": "High-impedance TTL/CMOS compatible control input that can be driven as high as VDD + 0.3V or as low as -5V, and slow rising or falling input edges should be avoided to prevent double-pulsing of the output."
},
{
"number": "3",
"name": "NC",
"type": "unconnected",
"description": "No connection."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground return path for the bias current and the high peak discharge currents, which should be tied to a ground plane or connected with very short traces to the bias supply source return."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Duplicate ground return pin for the bias and high peak discharge currents; it must be connected together with pin 4 for proper operation."
},
{
"number": "6",
"name": "OUTPUT",
"type": "output",
"description": "CMOS push-pull output capable of driving a capacitive load with 6.0A peak current and withstanding 1.5A peak reverse current of either polarity; it must be connected together with pin 7 for proper operation."
},
{
"number": "7",
"name": "OUTPUT",
"type": "output",
"description": "Duplicate CMOS push-pull output capable of 6.0A peak current and withstanding 1.5A peak reverse current of either polarity; it must be connected together with pin 6 for proper operation."
},
{
"number": "8",
"name": "VDD",
"type": "power_in",
"description": "Duplicate bias supply input rated 4.5V to 18V with respect to the ground pins; it must be connected together with pin 1 for proper operation."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Page 1 Note 1 states duplicate pins must both be connected for proper operation. The table lists VDD; Ground is duplicated on pins 4 and 5 in the SOIC pinout. Per the datasheet's duplicate-pin note, bot; OUTPUT is duplicated on pins 6 and 7 in the SOIC pinout. Per the datasheet's duplicate-pin note, bot"
],
"pages_sent": 22,
"cost_usd": 0.0847,
"at": "2026-10-09T16:07:29"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588906639025561600",
"pages": 22,
"sha256": "1513714315f0665c",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-09",
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{
"file": "tc4420eoa713-etched.step",
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"sha256": "f94a0cb671b22b94d07d3cdc9549f9deba974f36d49b2d7fe8c3d44b73490283",
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}