component
TC1232EOA713
Public Made by Adomby adom
Microchip Tech Monitors & Reset Circuits, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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|---|---|
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| README.md | 10d ago |
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| tc1232eoa713-etched.step | 10d ago |
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| tc1232eoa713-hero.overlay.json | 10d ago |
| tc1232eoa713.glb | 10d ago |
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| tc1232eoa713.lbr | 10d ago |
| tc1232eoa713.step | 10d ago |
TC1232EOA713
Microchip Tech · Monitors & Reset Circuits · SOIC-8
TC1232EOA713 from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB RST | input | Push button reset input that ignores pulses shorter than 1 ms, recognizes pulses of 20 ms or greater, and forces both reset outputs active while driven low. |
| 2 | TD | input | Time delay input that sets the watchdog time-out to 150 ms with TD at GND, 600 ms when open, and 1.2 s when tied to VCC. |
| 3 | TOL | input | Tolerance input that sets the VCC trip point to 4.75V (5% tolerance) when tied to GND and 4.5V (10% tolerance) when tied to VCC. |
| 4 | GND | power_in | The ground reference for the device. |
| 5 | RST | output | Push-pull active-high reset output that goes high if VCC falls below the selected threshold, PB RST is forced low, the ST input is not strobed within the time-out period, or during power-up. |
| 6 | RST | output | Open-drain active-low reset output that goes low under the same conditions as RST (VCC below threshold, PB RST forced low, missed ST strobe, or power-up). |
| 7 | ST | input | Watchdog strobe input in which each falling edge resets the watchdog timer counter; a time-out forces the reset outputs active for at least 250 ms. |
| 8 | VCC | power_in | The positive supply (+5V nominal) for the device, specified for an operating voltage of 4.0V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Low Level (ST and PB RST) | VIL | -0.3 | 0.8 | V | 2 | ||
| Input Leakage (ST, TOL) | IL | -1 | 1 | µA | 2 | ||
| Output Current RST | IOH | -1 | -12 | mA | VOH = 2.4V | 2 | |
| Output Current RST, RST | IOL | 2 | 10 | mA | VOL = 0.4V | 2 | |
| Input Capacitance (ST, TOL) | CIN | 5 | pF | 2 | |||
| Output Capacitance (RST, RST) | COUT | 7 | pF | 2 | |||
| Supply Voltage | VCC | 4 | 5 | 5.5 | V | 2 | |
| Input High Level (ST and PB RST) | VIH | 2 | V | Note 1 | 2 | ||
| Operating Current | ICC | 50 | 200 | µA | Note 2 (measured with outputs open) | 2 | |
| VCC 5% Trip Point | VCCTP | 4.5 | 4.62 | 4.74 | V | TOL = GND (Note 3) | 2 |
| VCC 10% Trip Point | VCCTP | 4.25 | 4.37 | 4.49 | V | TOL = VCC (Note 3) | 2 |
| VCC Fall Time | tF | 10 | µs | Note 1 | 3 | ||
| VCC Rise Time | tR | 0 | µs | Note 1 | 3 | ||
| VCC Trip Point Detected to RST High and RST Low | tRPD | 100 | ns | VCC falling | 3 | ||
| VCC Trip Point Detected to RST High and RST Open | tRPU | 250 | 610 | 1000 | ms | VCC rising (Note 2) | 3 |
| PB RST Pulse Width | tPB | 20 | ms | Note 1 | 4 | ||
| PB RST Falling Edge Low to Reset Active | tPBD | 1 | 4 | 20 | ms | 4 | |
| PB RST Rising Edge High to Reset Inactive | tRST | 250 | 610 | 1000 | ms | 4 | |
| ST Pulse Width | tST | 20 | ns | 4 | |||
| ST Time-out Period | tTD | 62.5 | 150 | 250 | ms | TD Pin = 0V | 4 |
| ST Time-out Period | tTD | 250 | 600 | 1000 | ms | TD Pin = Open | 4 |
| ST Time-out Period | tTD | 500 | 1200 | 2000 | ms | TD Pin = VCC | 4 |
| Voltage on Any Pin (with respect to GND) | -0.3 | 5.8 | V | With respect to GND | 2 | ||
| Operating Temperature Range (E-Version) | TA | -40 | 85 | °C | E-Version (this MPN's grade) | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 |
CAD (KiCad official)
- Symbol:
TC1232EOA713 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tc1232eoa713-etched.step/tc1232eoa713-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc1232eoa713.step/tc1232eoa713.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (24 pp, sha256
bf8a3940fbb9a6ff, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).