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T810-600B
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STMicroelectronics Thyristors (SCR)/Modules, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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t810-600b: specified limits as data (metadata.characteristics, 23 rows from the datasheet)
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T810-600B
STMicroelectronics · Thyristors (SCR)/Modules · DPAK
T810-600B from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | passive | Main terminal A1 of the triac, the reference terminal for gate triggering and for A2 voltage (both polarities of A2 referenced to A1). |
| 2 | A2 | passive | Main terminal A2 of the triac, connected to the tab, with VDRM/VRRM of 600 V for T810-600B and 8 A RMS on-state current (IT(RMS), Tc = 110 °C). |
| 3 | G | input | Gate trigger input; T810 logic-level version has IGT max 10 mA (VD = 12 V, RL = 30 Ω) and VGT max 1.2 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| RMS on-state current (full sine wave), Tc = 110 °C | IT(RMS) | 8 | A | IPAK, DPAK, TO-220AB, D2PAK; Tc = 110 °C | 2 | ||
| Non repetitive surge peak on-state current | ITSM | 80 | A | f = 50 Hz, t = 20 ms; full cycle, Tj initial = 25 °C | 2 | ||
| Non repetitive surge peak on-state current | ITSM | 84 | A | f = 60 Hz, tp = 16.7 ms; full cycle, Tj initial = 25 °C | 2 | ||
| I2t value for fusing | I2t | 36 | A2s | tp = 10 ms | 2 | ||
| Critical rate of rise of on-state current | dI/dt | 50 | A/µs | IG = 2 x IGT, tr ≤ 100 ns, f = 120 Hz, Tj = 125 °C | 2 | ||
| Peak gate current | IGM | 4 | A | tp = 20 µs, Tj = 125 °C | 2 | ||
| Average gate power dissipation | PG(AV) | 1 | W | Tj = 125 °C | 2 | ||
| Storage junction temperature range | Tstg | -40 | 150 | °C | 2 | ||
| Operating junction temperature range | Tj | -40 | 125 | °C | 2 | ||
| Triggering gate current (10 mA sensitivity column, T810) | IGT | 10 | mA | VD = 12 V, RL = 30 Ω, quadrants I - II - III | 2 | ||
| Gate trigger voltage | VGT | 1.2 | V | quadrants I - II - III | 2 | ||
| Gate non-trigger voltage | VGD | 0.2 | V | VD = VDRM, RL = 3.3 kΩ, Tj = 125 °C, quadrants I - II - III | 2 | ||
| Holding current (10 mA column, T810) | IH | 15 | mA | IT = 100 mA, quadrants I - II - III | 2 | ||
| Latching current (10 mA column, T810), quadrants I and III | IL | 25 | mA | IG = 1.2 x IGT, quadrants I - III | 2 | ||
| Latching current (10 mA column, T810), quadrant II | IL | 30 | mA | IG = 1.2 x IGT, quadrant II | 2 | ||
| Critical rate of rise of off-state voltage (10 mA column, T810) | dV/dt | 40 | V/µs | VD = 67% VDRM, gate open, Tj = 125 °C | 2 | ||
| Threshold on-state voltage | VTO | 0.85 | V | Tj = 125 °C | 3 | ||
| Dynamic resistance | RD | 50 | mΩ | Tj = 125 °C | 3 | ||
| On-state voltage | VTM | 1.55 | V | ITM = 11 A, tp = 380 µs, Tj = 25 °C | 3 | ||
| Off-state and reverse leakage current | IDRM IRRM | 5 | µA | VDRM = VRRM, Tj = 25 °C | 3 | ||
| Off-state and reverse leakage current | IDRM IRRM | 1 | mA | VDRM = VRRM, Tj = 125 °C | 3 | ||
| Max. junction to case thermal resistance (AC) | Rth(j-c) | 1.6 | °C/W | IPAK / D2PAK / DPAK / TO-220AB | 3 | ||
| Junction to ambient thermal resistance (typ.) | Rth(j-a) | 70 | °C/W | DPAK; S = 1 cm² copper surface under tab, FR4 PCB, copper 35 µm | 3 |
CAD (KiCad official)
- Symbol:
T810-600B - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files:
t810-600b-etched.step/t810-600b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);t810-600b.step/t810-600b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (21 pp, sha256
ad680880278c15e3, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# T810-600B
**STMicroelectronics** · Thyristors (SCR)/Modules · DPAK
T810-600B from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | passive | Main terminal A1 of the triac, the reference terminal for gate triggering and for A2 voltage (both polarities of A2 referenced to A1). |
| 2 | A2 | passive | Main terminal A2 of the triac, connected to the tab, with VDRM/VRRM of 600 V for T810-600B and 8 A RMS on-state current (IT(RMS), Tc = 110 °C). |
| 3 | G | input | Gate trigger input; T810 logic-level version has IGT max 10 mA (VD = 12 V, RL = 30 Ω) and VGT max 1.2 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| RMS on-state current (full sine wave), Tc = 110 °C | IT(RMS) | | | 8 | A | IPAK, DPAK, TO-220AB, D2PAK; Tc = 110 °C | 2 |
| Non repetitive surge peak on-state current | ITSM | | | 80 | A | f = 50 Hz, t = 20 ms; full cycle, Tj initial = 25 °C | 2 |
| Non repetitive surge peak on-state current | ITSM | | | 84 | A | f = 60 Hz, tp = 16.7 ms; full cycle, Tj initial = 25 °C | 2 |
| I2t value for fusing | I2t | | | 36 | A2s | tp = 10 ms | 2 |
| Critical rate of rise of on-state current | dI/dt | | | 50 | A/µs | IG = 2 x IGT, tr ≤ 100 ns, f = 120 Hz, Tj = 125 °C | 2 |
| Peak gate current | IGM | | | 4 | A | tp = 20 µs, Tj = 125 °C | 2 |
| Average gate power dissipation | PG(AV) | | | 1 | W | Tj = 125 °C | 2 |
| Storage junction temperature range | Tstg | -40 | | 150 | °C | | 2 |
| Operating junction temperature range | Tj | -40 | | 125 | °C | | 2 |
| Triggering gate current (10 mA sensitivity column, T810) | IGT | | | 10 | mA | VD = 12 V, RL = 30 Ω, quadrants I - II - III | 2 |
| Gate trigger voltage | VGT | | | 1.2 | V | quadrants I - II - III | 2 |
| Gate non-trigger voltage | VGD | 0.2 | | | V | VD = VDRM, RL = 3.3 kΩ, Tj = 125 °C, quadrants I - II - III | 2 |
| Holding current (10 mA column, T810) | IH | | | 15 | mA | IT = 100 mA, quadrants I - II - III | 2 |
| Latching current (10 mA column, T810), quadrants I and III | IL | | | 25 | mA | IG = 1.2 x IGT, quadrants I - III | 2 |
| Latching current (10 mA column, T810), quadrant II | IL | | | 30 | mA | IG = 1.2 x IGT, quadrant II | 2 |
| Critical rate of rise of off-state voltage (10 mA column, T810) | dV/dt | | | 40 | V/µs | VD = 67% VDRM, gate open, Tj = 125 °C | 2 |
| Threshold on-state voltage | VTO | | | 0.85 | V | Tj = 125 °C | 3 |
| Dynamic resistance | RD | | | 50 | mΩ | Tj = 125 °C | 3 |
| On-state voltage | VTM | | | 1.55 | V | ITM = 11 A, tp = 380 µs, Tj = 25 °C | 3 |
| Off-state and reverse leakage current | IDRM IRRM | | | 5 | µA | VDRM = VRRM, Tj = 25 °C | 3 |
| Off-state and reverse leakage current | IDRM IRRM | | | 1 | mA | VDRM = VRRM, Tj = 125 °C | 3 |
| Max. junction to case thermal resistance (AC) | Rth(j-c) | | | 1.6 | °C/W | IPAK / D2PAK / DPAK / TO-220AB | 3 |
| Junction to ambient thermal resistance (typ.) | Rth(j-a) | | 70 | | °C/W | DPAK; S = 1 cm² copper surface under tab, FR4 PCB, copper 35 µm | 3 |
## CAD (KiCad official)
- Symbol: `T810-600B`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files: `t810-600b-etched.step` / `t810-600b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `t810-600b.step` / `t810-600b.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603086213213937664) (21 pp, sha256 `ad680880278c15e3`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/t810-600b-datasheet.pdf)