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SVF4N65DTR

Hangzhou Silan Microelectronics · MOSFETs · TO-252-2(DPAK)

SVF4N65DTR from Hangzhou Silan Microelectronics, in a TO-252-2(DPAK). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the N-channel MOSFET; gate-source voltage VGS is rated at ±30 V maximum.
2 D passive Drain of the N-channel MOSFET; drain-source voltage is rated at 650 V maximum with continuous drain current of 4.0 A at TC=25°C.
3 S passive Source of the N-channel MOSFET; source current IS is rated at 4.0 A continuous and 16 A pulsed.

Key specifications

Parameter Value
Manufacturer Hangzhou Silan Microelectronics
Package TO-252-2(DPAK)
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS 650 V 2
Gate-source voltage VGS -30 30 V 2
Drain current (continuous) ID 4 A TC=25°C 2
Drain current (continuous) ID 2.5 A TC=100°C 2
Drain pulse current IDM 16 A 2
Power dissipation (SVF4N65CAM/D column) PD 77 W TC=25°C 2
Single pulse avalanche energy EAS 215 mJ L=30mH, IAS=3.6A, VDD=100V, RG=25Ω, TJ=25°C (note 1) 2
Operating junction temperature range TJ -55 150 °C 2
Storage temperature range Tstg -55 150 °C 2
Drain-source breakdown voltage BVDSS 650 V VGS=0V, ID=250µA 2
Drain-source leakage current IDSS 1 µA VDS=650V, VGS=0V 2
Gate-source leakage current IGSS -100 100 nA VGS=±30V, VDS=0V 2
Gate threshold voltage VGS(th) 2 4 V VGS=VDS, ID=250µA 2
Static drain-source on-resistance RDS(on) 2.3 2.7 Ω VGS=10V, ID=2.0A 2
Input capacitance Ciss 315 410 533 pF VDS=25V, VGS=0V, f=1.0MHz 2
Continuous source current (body diode) IS 4 A 3
Source pulse current (body diode) ISM 16 A 3
Source-drain diode forward voltage VSD 1.4 V IS=4.0A, VGS=0V 3
Power dissipation derating (SVF4N65CAM/D column) PD 0.62 W/°C Derate above 25°C 2
Thermal resistance, junction to case (SVF4N65CAM/D column) RθJC 1.62 °C/W 2
Thermal resistance, junction to ambient (SVF4N65CAM/D column) RθJA 62 °C/W 2
Output capacitance Coss 55 pF VDS=25V, VGS=0V, f=1.0MHz 2
Reverse transfer capacitance Crss 5.8 pF VDS=25V, VGS=0V, f=1.0MHz 2
Turn-on delay time td(on) 12.5 ns VDD=325V, VGS=10V, RG=25Ω, ID=4A 2
Turn-on rise time tr 22.3 ns VDD=325V, VGS=10V, RG=25Ω, ID=4A 2
Turn-off delay time td(off) 39.5 ns VDD=325V, VGS=10V, RG=25Ω, ID=4A 2
Turn-off fall time tf 22.8 ns VDD=325V, VGS=10V, RG=25Ω, ID=4A 2
Total gate charge Qg 12.8 nC VDD=520V, VGS=10V, ID=4A 2
Gate-source charge Qgs 2.7 nC VDD=520V, VGS=10V, ID=4A 2
Gate-drain charge Qgd 6.65 nC VDD=520V, VGS=10V, ID=4A 2
Reverse recovery time trr 423 ns IS=4.0A, VGS=0V, dIF/dt=100A/µs 3
Reverse recovery charge Qrr 1.87 µC 3

CAD (KiCad official)

  • Symbol: SVF4N65DTR
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252-2(DPAK) (KiCad packages3D, STEP)
  • 3D model files: svf4n65dtr-etched.step / svf4n65dtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); svf4n65dtr.step / svf4n65dtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Hangzhou Silan Microelectronics datasheet (8 pp, sha256 843d5549bbdf7754, retrieved 2026-10-16, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF