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SUP90100E-GE3

Public Made by Adom

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Vishay Intertech MOSFETs, TO-220AB. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttriode-mos tube-transistorsup90100e-ge3factory-2.0.0extractor-text

Verified SUP90100E-GE3

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SUP90100E-GE3 · TO-220AB · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 7-page datasheet
  • ✓distributor: lcsc C3280719, digikey 742-SUP90100E-GE3-ND, mouser 78-SUP90100E-GE3
  • ✓family: TO-220-3_Vertical
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-76qm2emo/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sup90100e-ge3.kicad_sym✓ sup90100e-ge3.kicad_mod✓ sup90100e-ge3.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers sup90100e-ge3: viewers · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago
sup90100e-ge3-etched.glb Publish 0.1.0 · Ray 7d ago
sup90100e-ge3-etched.step sup90100e-ge3: factory component page (tier=mfr) · Ray 7d ago
sup90100e-ge3-hero.glb sup90100e-ge3: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
sup90100e-ge3-hero.overlay.json Publish 0.1.0 · Ray 7d ago
sup90100e-ge3.glb Publish 0.1.0 · Ray 7d ago
sup90100e-ge3.kicad_mod Publish 0.1.0 · Ray 7d ago
sup90100e-ge3.kicad_sym Publish 0.1.0 · Ray 7d ago
sup90100e-ge3.lbr Publish 0.1.0 · Ray 7d ago
sup90100e-ge3.step Publish 0.1.0 · Ray 7d ago
verification.json Verified: Published by the parts factory: tier mfr, 3 pins · Ray 7d ago

SUP90100E-GE3

Vishay Intertech · MOSFETs · TO-220AB

SUP90100E-GE3 from Vishay Intertech, in a TO-220AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; the gate-source voltage is rated at ±20 V maximum and the gate threshold is 2 V to 4 V.
2 D passive Drain, rated for 200 V drain-source voltage and 150 A package-limited continuous current; it is also connected to the mounting tab.
3 S passive Source, the current return of the N-channel MOSFET, with pulsed body-diode current up to 250 A.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TO-220AB
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS 200 V TC = 25 °C 1
Gate-source voltage VGS -20 20 V TC = 25 °C 1
Continuous drain current ID 150 A TJ = 150 °C, TC = 25 °C, package limited 1
Pulsed drain current IDM 250 A t = 100 μs 1
Avalanche current IAS 70 A 1
Single avalanche energy EAS 245 mJ L = 0.1 mH 1
Maximum power dissipation PD 375 W TC = 25 °C 1
Maximum power dissipation PD 125 W TC = 125 °C 1
Operating junction and storage temperature range TJ, Tstg -55 175 °C 1
Junction-to-ambient (PCB mount) RthJA 40 °C/W When mounted on 1" square PCB (FR4 material) 1
Junction-to-case (drain) RthJC 0.4 °C/W 1
Drain-source breakdown voltage VDS 200 V VGS = 0 V, ID = 250 μA 2
Gate threshold voltage VGS(th) 2 4 V VDS = VGS, ID = 250 μA 2
Gate-body leakage IGSS -250 250 nA VDS = 0 V, VGS = ± 20 V 2
Zero gate voltage drain current IDSS 1 μA VDS = 200 V, VGS = 0 V 2
Zero gate voltage drain current IDSS 150 μA VDS = 200 V, VGS = 0 V, TJ = 125 °C 2
Zero gate voltage drain current IDSS 5 mA VDS = 200 V, VGS = 0 V, TJ = 175 °C 2
On-state drain current ID(on) 120 A VDS ≥ 10 V, VGS = 10 V 2
Drain-source on-state resistance RDS(on) 0.0091 0.0109 Ω VGS = 10 V, ID = 16 A 2
Drain-source on-state resistance RDS(on) 0.0095 0.0124 Ω VGS = 7.5 V, ID = 13 A 2
Total gate charge Qg 72.8 110 nC VDS = 100 V, VGS = 10 V, ID = 16 A 2
Gate resistance Rg 0.7 3.5 7 Ω f = 1 MHz 2
Turn-on delay time td(on) 20 40 ns VDD = 80 V, RL = 6.2 Ω, ID ≅ 13 A, VGEN = 10 V, Rg = 1 Ω 2
Rise time tr 50 100 ns VDD = 80 V, RL = 6.2 Ω, ID ≅ 13 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 60 120 ns VDD = 80 V, RL = 6.2 Ω, ID ≅ 13 A, VGEN = 10 V, Rg = 1 Ω 2
Fall time tf 18 36 ns VDD = 80 V, RL = 6.2 Ω, ID ≅ 13 A, VGEN = 10 V, Rg = 1 Ω 2
Pulsed current (body diode) ISM 250 A t = 100 μs, TC = 25 °C 2
Forward voltage VSD 0.8 1.5 V IF = 10 A, VGS = 0 V 2
Reverse recovery time trr 118 177 ns IF = 13 A, di/dt = 100 A/μs 2
Peak reverse recovery charge IRM(REC) 9.4 14.1 A IF = 13 A, di/dt = 100 A/μs 2
Reverse recovery charge Qrr 0.632 0.948 μC IF = 13 A, di/dt = 100 A/μs 2
Forward transconductance gfs 85 S VDS = 15 V, ID = 13 A 2
Input capacitance Ciss 3930 pF VGS = 0 V, VDS = 100 V, f = 1 MHz 2
Output capacitance Coss 450 pF VGS = 0 V, VDS = 100 V, f = 1 MHz 2
Reverse transfer capacitance Crss 12 pF VGS = 0 V, VDS = 100 V, f = 1 MHz 2
Gate-source charge Qgs 19.4 nC VDS = 100 V, VGS = 10 V, ID = 16 A 2
Gate-drain charge Qgd 19 nC VDS = 100 V, VGS = 10 V, ID = 16 A 2
Reverse recovery fall time ta 94 ns IF = 13 A, di/dt = 100 A/μs 2
Reverse recovery rise time tb 24 ns IF = 13 A, di/dt = 100 A/μs 2

CAD (KiCad official)

  • Symbol: SUP90100E-GE3
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220AB (KiCad packages3D, STEP)
  • 3D model files: sup90100e-ge3-etched.step / sup90100e-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sup90100e-ge3.step / sup90100e-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (7 pp, sha256 77d793fe262f0f0b, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF