component

STW6N90K5

Public Made by Adom

by adom

STMicroelectronics MOSFETs, TO-247. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsstw6n90k5factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 14d ago
viewers stw6n90k5: viewers · Ray 14d ago
package.json Publish 0.1.0 · Ray 14d ago
page.json Set visibility: public · Ray 14d ago
README.md Publish 0.1.0 · Ray 14d ago
stw6n90k5-etched.glb Publish 0.1.0 · Ray 14d ago
stw6n90k5-etched.step stw6n90k5: factory component page (tier=mfr) · Ray 14d ago
stw6n90k5-hero.glb stw6n90k5: hero GLB from the etched model (keeps the MPN mark) · Ray 14d ago
stw6n90k5-hero.overlay.json Publish 0.1.0 · Ray 14d ago
stw6n90k5.glb Publish 0.1.0 · Ray 14d ago
stw6n90k5.kicad_mod Publish 0.1.0 · Ray 14d ago
stw6n90k5.kicad_sym Publish 0.1.0 · Ray 14d ago
stw6n90k5.lbr Publish 0.1.0 · Ray 14d ago
stw6n90k5.step Publish 0.1.0 · Ray 14d ago

STW6N90K5

STMicroelectronics · MOSFETs · TO-247

STW6N90K5 from STMicroelectronics, in a TO-247. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal of the MDmesh K5 N-channel power MOSFET, which the datasheet states is Zener-protected.
2 D passive Drain terminal, also connected to the TAB, for the 900 V N-channel MOSFET rated at VDS 900 V.
3 S passive Source terminal of the N-channel MOSFET, carrying a continuous drain current of 6 A at TC = 25 °C.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-247
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage V(BR)DSS 900 V VGS = 0 V, ID = 1 mA 3
Zero gate voltage drain current IDSS 1 µA VGS = 0 V, VDS = 900 V 3
Zero gate voltage drain current at TC = 125 °C IDSS 50 µA VGS = 0 V, VDS = 900 V, TC = 125 °C (specified by design, not tested in production) 3
Gate-body leakage current IGSS -10 10 µA VDS = 0 V, VGS = ±20 V 3
Gate threshold voltage VGS(th) 3 4 5 V VDS = VGS, ID = 100 µA 3
Static drain-source on-resistance RDS(on) 910 1100 mΩ VGS = 10 V, ID = 3 A 3
Gate-source voltage VGS -30 30 V 2
Drain current (continuous) at TC = 25 °C ID 6 A TC = 25 °C 2
Drain current (continuous) at TC = 100 °C ID 4 A TC = 100 °C 2
Drain current (pulsed) IDM 24 A Pulse width limited by safe operating area 2
Total power dissipation PTOT 110 W TC = 25 °C 2
Peak diode recovery voltage slope dv/dt 4.5 V/ns ISD ≤ 6 A, di/dt = 100 A/µs, VDS(peak) < V(BR)DSS, VDD = 450 V 2
MOSFET dv/dt ruggedness dv/dt 50 V/ns VDD ≤ 720 V 2
Storage temperature range Tstg -55 150 °C 2
Avalanche current, repetitive or non-repetitive IAR 2 A Pulse width limited by TJ max. 2
Single pulse avalanche energy EAS 210 mJ Starting TJ = 25 °C, ID = IAR, VDD = 50 V 2
Source-drain current ISD 6 A 4
Source-drain current (pulsed) ISDM 24 A 4
Forward on voltage VSD 1.5 V VGS = 0 V, ISD = 6 A 4
Thermal resistance, junction-to-case RthJC 1.14 °C/W 2
Thermal resistance, junction-to-ambient RthJA 50 °C/W 2
Input capacitance Ciss 342 pF VDS = 100 V, f = 1 MHz, VGS = 0 V 3
Output capacitance Coss 31 pF VDS = 100 V, f = 1 MHz, VGS = 0 V 3
Reverse transfer capacitance Crss 1.2 pF VDS = 100 V, f = 1 MHz, VGS = 0 V 3
Equivalent output capacitance time related Co(tr) 55 pF VDS = 0 to 720 V, VGS = 0 V 3
Equivalent output capacitance energy related Co(er) 20 pF VDS = 0 to 720 V, VGS = 0 V 3
Intrinsic gate resistance Rg 6.4 Ω f = 1 MHz, ID = 0 A 3
Total gate charge Qg 11 nC VDD = 720 V, ID = 6 A, VGS = 0 to 10 V 3
Gate-source charge Qgs 2.5 nC VDD = 720 V, ID = 6 A, VGS = 0 to 10 V 3
Gate-drain charge Qgd 7 nC VDD = 720 V, ID = 6 A, VGS = 0 to 10 V 3
Turn-on delay time td(on) 12.4 ns VDD = 450 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V 3
Rise time tr 12.2 ns VDD = 450 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V 3
Turn-off delay time td(off) 30.4 ns VDD = 450 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V 3
Fall time tf 15.5 ns VDD = 450 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V 3
Reverse recovery time trr 342 ns ISD = 6 A, di/dt = 100 A/µs, VDD = 60 V 4
Reverse recovery charge Qrr 3.13 µC ISD = 6 A, di/dt = 100 A/µs, VDD = 60 V 4
Reverse recovery current IRRM 18.3 A ISD = 6 A, di/dt = 100 A/µs, VDD = 60 V 4
Reverse recovery time at TJ = 150 °C trr 536 ns ISD = 6 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C 4
Reverse recovery charge at TJ = 150 °C Qrr 4.42 µC ISD = 6 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C 4
Reverse recovery current at TJ = 150 °C IRRM 16.5 A ISD = 6 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C 4

CAD (KiCad official)

  • Symbol: STW6N90K5
  • Footprint: Package_TO_SOT_THT:TO-247-3_Vertical
  • 3D model: TO-247 (KiCad packages3D, STEP)
  • 3D model files: stw6n90k5-etched.step / stw6n90k5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stw6n90k5.step / stw6n90k5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (12 pp, sha256 69390a7cdf875cc8, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF