# STW30N65M5

**STMicroelectronics** · MOSFETs · TO-247-3

STW30N65M5 from STMicroelectronics, in a TO-247-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the channel, with gate-source voltage limited to ±25 V and a threshold of 3 V min, 4 V typ, 5 V max at ID = 250 µA. |
| 2 | D | passive | Drain, also connected to the TAB; drain-source breakdown voltage is 650 V min and continuous drain current is 22 A at TC = 25 °C. |
| 3 | S | passive | Source; the source-drain body diode carries up to 22 A continuous (88 A pulsed). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TO-247-3 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate-source voltage | VGS | -25 |  | 25 | V |  | 2 |
| Drain current (continuous) at TC = 25 °C | ID |  |  | 22 | A | TC = 25 °C | 2 |
| Drain current (continuous) at TC = 100 °C | ID |  |  | 13 | A | TC = 100 °C | 2 |
| Drain current (pulsed) | IDM |  |  | 88 | A | Pulse width limited by safe operating area | 2 |
| Total power dissipation at TC = 25 °C | PTOT |  |  | 140 | W | TC = 25 °C | 2 |
| Peak diode recovery voltage slope | dv/dt |  |  | 15 | V/ns | ISD ≤ 21 A, di/dt ≤ 400 A/μs; VDS (peak) < V(BR)DSS | 2 |
| Storage temperature range | Tstg | -55 |  | 150 | °C |  | 2 |
| Avalanche current, repetitive or not-repetitive | IAR |  |  | 7 | A | pulse width limited by TJ max. | 2 |
| Single pulse avalanche energy | EAS |  |  | 500 | mJ | starting TJ = 25 °C, ID = IAR, VDD = 50 V | 2 |
| Drain-source breakdown voltage | V(BR)DSS | 650 |  |  | V | ID = 1 mA, VGS = 0 V | 3 |
| Zero gate voltage drain current | IDSS |  |  | 1 | µA | VGS = 0 V, VDS = 650 V | 3 |
| Zero gate voltage drain current (TC = 125 °C) | IDSS |  |  | 100 | µA | VGS = 0 V, VDS = 650 V, TC = 125 °C (specified by design, not tested in production) | 3 |
| Gate body leakage current | IGSS | -100 |  | 100 | nA | VDS = 0 V, VGS = ±25 V | 3 |
| Gate threshold voltage | VGS(th) | 3 | 4 | 5 | V | VDS = VGS, ID = 250 µA | 3 |
| Static drain-source on-resistance | RDS(on) |  | 125 | 139 | mΩ | VGS = 10 V, ID = 11 A | 3 |
| Source-drain current | ISD |  |  | 22 | A |  | 4 |
| Source-drain current (pulsed) | ISDM |  |  | 88 | A |  | 4 |
| Forward on voltage | VSD |  |  | 1.5 | V | ISD = 22 A, VGS = 0 V | 4 |
| Thermal resistance, junction-to-case | RthJC |  | 0.83 |  | °C/W |  | 2 |
| Thermal resistance, junction-to-ambient (TO-247 column) | RthJA |  | 50 |  | °C/W | TO-247 column of Table 2 | 2 |

## CAD (KiCad official)

- Symbol: `STW30N65M5`
- Footprint: `Package_TO_SOT_THT:TO-247-3_Vertical`
- 3D model: TO-247-3 (KiCad packages3D, STEP)
- 3D model files: `stw30n65m5-etched.step` / `stw30n65m5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stw30n65m5.step` / `stw30n65m5.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stw30n65m5.pdf) (20 pp, sha256 `f97e95cc3bc5982f`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stw30n65m5-datasheet.pdf)