STM6601CQ2BDM6F

STMicroelectronics · Supervisor And Reset ICs · TDFN-12(2x3)

STM6601CQ2BDM6F from STMicroelectronics, in a TDFN-12(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC	power_in	Power supply input that is monitored during startup and normal operation for sufficient voltage; decouple it to ground with a 0.1 µF capacitor placed as close to the device as possible.
2	SR	input	Smart Reset button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection; it is active low with an optional 100 kΩ pull-up and must not be permanently grounded.
3	VREF	power_out	Precise 1.5 V voltage reference output with 1% accuracy that is disabled in standby; a 1 µF capacitor is mandatory on this pin even when VREF is unused.
4	PSHOLD	input	Power-supply hold input with a factory-trimmed voltage detector that confirms proper power-up and, when driven low during normal operation, deasserts the enable output; an internal pull-down is active during startup.
5	CSRD	passive	Smart Reset delay input where a capacitor to ground sets the additional delay tSRD (charged with ISRD), a low-ESR ceramic is recommended, and the pin is left open if no capacitor is used.
6	PB	input	Power-on push-button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection that must be switched to GND and has an internal 100 kΩ pull-up.
7	VCCLO	output	Active-low open-drain high-threshold detection output that is low when VCC is below VTH+ at power-up or during undervoltage in normal operation, requires a pull-up (10 kΩ typical), and is floating in standby.
8	PBOUT	output	Active-low open-drain output that reflects the PB push-button state after tDEBOUNCE, ignores PB during undervoltage, and requires a pull-up (10 kΩ typical).
9	EN or EN	output	Push-pull enable output that asserts after a valid push-button turn-on with VCC above VTH+ and releases if the push-button is released before PSHOLD is high, PSHOLD is driven low, undervoltage persists too long, or a long push is detected; for this ordering code (option C) it is active high EN.
10	RST	output	Active-low open-drain reset output that is pulled low for tREC (240 ms min.) during startup and requires a pull-up (10 kΩ typical); on this variant a long push deasserts EN instead of asserting RST.
11	INT	output	Active-low open-drain interrupt output that is driven low for at least tINT_Min on a push-button press longer than tDEBOUNCE or on VCC undervoltage, held high during power-up, and requires a pull-up (10 kΩ typical).
12	GND	power_in	Ground reference for the device.
13	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	TDFN-12(2x3)
Category	Power Management (PMIC)
Pins	13

CAD (KiCad official)

Symbol: STM6601CQ2BDM6F
Footprint: Package_DFN_QFN:DFN-12-1EP_2x3mm_P0.45mm_EP0.64x2.4mm
3D model: TDFN-12(2x3) (KiCad packages3D, STEP)
3D model files: stm6601cq2bdm6f-etched.step / stm6601cq2bdm6f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm6601cq2bdm6f.step / stm6601cq2bdm6f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (52 pp, sha256 24305a688f436ae9, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# STM6601CQ2BDM6F

**STMicroelectronics** · Supervisor And Reset ICs · TDFN-12(2x3)

STM6601CQ2BDM6F from STMicroelectronics, in a TDFN-12(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply input that is monitored during startup and normal operation for sufficient voltage; decouple it to ground with a 0.1 µF capacitor placed as close to the device as possible. |
| 2 | SR | input | Smart Reset button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection; it is active low with an optional 100 kΩ pull-up and must not be permanently grounded. |
| 3 | VREF | power_out | Precise 1.5 V voltage reference output with 1% accuracy that is disabled in standby; a 1 µF capacitor is mandatory on this pin even when VREF is unused. |
| 4 | PSHOLD | input | Power-supply hold input with a factory-trimmed voltage detector that confirms proper power-up and, when driven low during normal operation, deasserts the enable output; an internal pull-down is active during startup. |
| 5 | CSRD | passive | Smart Reset delay input where a capacitor to ground sets the additional delay tSRD (charged with ISRD), a low-ESR ceramic is recommended, and the pin is left open if no capacitor is used. |
| 6 | PB | input | Power-on push-button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection that must be switched to GND and has an internal 100 kΩ pull-up. |
| 7 | VCCLO | output | Active-low open-drain high-threshold detection output that is low when VCC is below VTH+ at power-up or during undervoltage in normal operation, requires a pull-up (10 kΩ typical), and is floating in standby. |
| 8 | PBOUT | output | Active-low open-drain output that reflects the PB push-button state after tDEBOUNCE, ignores PB during undervoltage, and requires a pull-up (10 kΩ typical). |
| 9 | EN or EN | output | Push-pull enable output that asserts after a valid push-button turn-on with VCC above VTH+ and releases if the push-button is released before PSHOLD is high, PSHOLD is driven low, undervoltage persists too long, or a long push is detected; for this ordering code (option C) it is active high EN. |
| 10 | RST | output | Active-low open-drain reset output that is pulled low for tREC (240 ms min.) during startup and requires a pull-up (10 kΩ typical); on this variant a long push deasserts EN instead of asserting RST. |
| 11 | INT | output | Active-low open-drain interrupt output that is driven low for at least tINT_Min on a push-button press longer than tDEBOUNCE or on VCC undervoltage, held high during power-up, and requires a pull-up (10 kΩ typical). |
| 12 | GND | power_in | Ground reference for the device. |
| 13 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TDFN-12(2x3) |
| Category | Power Management (PMIC) |
| Pins | 13 |

## CAD (KiCad official)

- Symbol: `STM6601CQ2BDM6F`
- Footprint: `Package_DFN_QFN:DFN-12-1EP_2x3mm_P0.45mm_EP0.64x2.4mm`
- 3D model: TDFN-12(2x3) (KiCad packages3D, STEP)
- 3D model files: `stm6601cq2bdm6f-etched.step` / `stm6601cq2bdm6f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm6601cq2bdm6f.step` / `stm6601cq2bdm6f.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881815842643968) (52 pp, sha256 `24305a688f436ae9`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm6601cq2bdm6f-datasheet.pdf)