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STM6601CQ2BDM6F
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STMicroelectronics Supervisor And Reset ICs, TDFN-12(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+49@@ -0,0 +1,49 @@+# STM6601CQ2BDM6F++**STMicroelectronics** · Supervisor And Reset ICs · TDFN-12(2x3)++STM6601CQ2BDM6F from STMicroelectronics, in a TDFN-12(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_in | Power supply input that is monitored during startup and normal operation for sufficient voltage; decouple it to ground with a 0.1 µF capacitor placed as close to the device as possible. |+| 2 | SR | input | Smart Reset button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection; it is active low with an optional 100 kΩ pull-up and must not be permanently grounded. |+| 3 | VREF | power_out | Precise 1.5 V voltage reference output with 1% accuracy that is disabled in standby; a 1 µF capacitor is mandatory on this pin even when VREF is unused. |+| 4 | PSHOLD | input | Power-supply hold input with a factory-trimmed voltage detector that confirms proper power-up and, when driven low during normal operation, deasserts the enable output; an internal pull-down is active during startup. |+| 5 | CSRD | passive | Smart Reset delay input where a capacitor to ground sets the additional delay tSRD (charged with ISRD), a low-ESR ceramic is recommended, and the pin is left open if no capacitor is used. |+| 6 | PB | input | Power-on push-button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection that must be switched to GND and has an internal 100 kΩ pull-up. |+| 7 | VCCLO | output | Active-low open-drain high-threshold detection output that is low when VCC is below VTH+ at power-up or during undervoltage in normal operation, requires a pull-up (10 kΩ typical), and is floating in standby. |+| 8 | PBOUT | output | Active-low open-drain output that reflects the PB push-button state after tDEBOUNCE, ignores PB during undervoltage, and requires a pull-up (10 kΩ typical). |+| 9 | EN or EN | output | Push-pull enable output that asserts after a valid push-button turn-on with VCC above VTH+ and releases if the push-button is released before PSHOLD is high, PSHOLD is driven low, undervoltage persists too long, or a long push is detected; for this ordering code (option C) it is active high EN. |+| 10 | RST | output | Active-low open-drain reset output that is pulled low for tREC (240 ms min.) during startup and requires a pull-up (10 kΩ typical); on this variant a long push deasserts EN instead of asserting RST. |+| 11 | INT | output | Active-low open-drain interrupt output that is driven low for at least tINT_Min on a push-button press longer than tDEBOUNCE or on VCC undervoltage, held high during power-up, and requires a pull-up (10 kΩ typical). |+| 12 | GND | power_in | Ground reference for the device. |+| 13 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | TDFN-12(2x3) |+| Category | Power Management (PMIC) |+| Pins | 13 |++## CAD (KiCad official)++- Symbol: `STM6601CQ2BDM6F`+- Footprint: `Package_DFN_QFN:DFN-12-1EP_2x3mm_P0.45mm_EP0.64x2.4mm`+- 3D model: TDFN-12(2x3) (KiCad packages3D, STEP)+- 3D model files: `stm6601cq2bdm6f-etched.step` / `stm6601cq2bdm6f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm6601cq2bdm6f.step` / `stm6601cq2bdm6f.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881815842643968) (52 pp, sha256 `24305a688f436ae9`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm6601cq2bdm6f-datasheet.pdf)
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decouple it to ground with a 0.1 µF capacitor placed as close to the device as possible."+ },+ {+ "number": "2",+ "name": "SR",+ "type": "input",+ "description": "Smart Reset button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection; it is active low with an optional 100 kΩ pull-up and must not be permanently grounded."+ },+ {+ "number": "3",+ "name": "VREF",+ "type": "power_out",+ "description": "Precise 1.5 V voltage reference output with 1% accuracy that is disabled in standby; a 1 µF capacitor is mandatory on this pin even when VREF is unused."+ },+ {+ "number": "4",+ "name": "PSHOLD",+ "type": "input",+ "description": "Power-supply hold input with a factory-trimmed voltage detector that confirms proper power-up and, when driven low during normal operation, deasserts the enable output; an internal pull-down is active during startup."+ },+ {+ "number": "5",+ "name": "CSRD",+ "type": "passive",+ "description": "Smart Reset delay input where a capacitor to ground sets the additional delay tSRD (charged with ISRD), a low-ESR ceramic is recommended, and the pin is left open if no capacitor is used."+ },+ {+ "number": "6",+ "name": "PB",+ "type": "input",+ "description": "Power-on push-button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection that must be switched to GND and has an internal 100 kΩ pull-up."+ },+ {+ "number": "7",+ "name": "VCCLO",+ "type": "output",+ "description": "Active-low open-drain high-threshold detection output that is low when VCC is below VTH+ at power-up or during undervoltage in normal operation, requires a pull-up (10 kΩ typical), and is floating in standby."+ },+ {+ "number": "8",+ "name": "PBOUT",+ "type": "output",+ "description": "Active-low open-drain output that reflects the PB push-button state after tDEBOUNCE, ignores PB during undervoltage, and requires a pull-up (10 kΩ typical)."+ },+ {+ "number": "9",+ "name": "EN or EN",+ "type": "output",+ "description": "Push-pull enable output that asserts after a valid push-button turn-on with VCC above VTH+ and releases if the push-button is released before PSHOLD is high, PSHOLD is driven low, undervoltage persists too long, or a long push is detected; for this ordering code (option C) it is active high EN."+ },+ {+ "number": "10",+ "name": "RST",+ "type": "output",+ "description": "Active-low open-drain reset output that is pulled low for tREC (240 ms min.) during startup and requires a pull-up (10 kΩ typical); on this variant a long push deasserts EN instead of asserting RST."+ },+ {+ "number": "11",+ "name": "INT",+ "type": "output",+ "description": "Active-low open-drain interrupt output that is driven low for at least tINT_Min on a push-button press longer than tDEBOUNCE or on VCC undervoltage, held high during power-up, and requires a pull-up (10 kΩ typical)."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device."+ },+ {+ "number": "13",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 9 is printed as 'EN or EN'. The polarity is inferred from the ordering code STM6601CQ2BDM6F: opt; The 240 ms tREC value is from the Table 10/11 footnote, and the RST function is stated for startup o; Pin type classes for VREF (power_out) and CSRD (passive) are judgment calls based on the datasheet's",+ "exposed pad 13 added from the footprint"+ ],+ "pages_sent": 23,+ "cost_usd": 0.1003,+ "at": "2026-10-08T00:39:58"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881815842643968",+ "pages": 52,+ "sha256": "24305a688f436ae9",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 13,+ "described": 13,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm6601cq2bdm6f.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 2,+ 2.98,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b31bd9302d4b25b31a41a44a286ba9e7e6890d59fdd9ec15b16dc263ab0a306f",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm6601cq2bdm6f-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 2,+ 2.98,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "aefc3cf73044f481c8b9744ae978073b185bb91b41f9f63c08c11e445fcf5b67",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}