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STM32WB55RGV6

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STMicroelectronics RF Transceiver ICs, QFN-68-EP(8x8). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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docs stm32wb55rgv6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers stm32wb55rgv6: viewers · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Initial commit: component/stm32wb55rgv6 · Ray 6d ago
stm32wb55rgv6-etched.fit.json stm32wb55rgv6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32wb55rgv6-etched.glb stm32wb55rgv6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32wb55rgv6-etched.step stm32wb55rgv6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32wb55rgv6.glb Publish 0.1.0 · Ray 6d ago
stm32wb55rgv6.kicad_mod Publish 0.1.0 · Ray 6d ago
stm32wb55rgv6.kicad_sym Publish 0.1.0 · Ray 6d ago
stm32wb55rgv6.lbr Publish 0.1.0 · Ray 6d ago
stm32wb55rgv6.step Publish 0.1.0 · Ray 6d ago

STM32WB55RGV6

STMicroelectronics · RF Transceiver ICs · QFN-68-EP(8x8)

STM32WB55RGV6 from STMicroelectronics, in a QFN-68-EP(8x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup supply for RTC, LSE oscillator, and backup registers; powered from external battery or VDD.
2 PC13 bidirectional GPIO port C bit 13 with RTC tamper, timestamp, output, and wakeup functions; powered through backup domain.
3 PC14-OSC32_IN bidirectional GPIO port C bit 14 or 32.768 kHz low-speed external oscillator input for RTC.
4 PC15-OSC32_OUT bidirectional GPIO port C bit 15 or 32.768 kHz low-speed external oscillator output.
5 PH3-BOOT0 bidirectional GPIO port H bit 3 with BOOT0 function for boot mode selection and configurable as GPIO.
6 PB8 bidirectional GPIO port B bit 8 with 5 V tolerant I/O; supports Timer, I2C1, SPI2, SAI, and LCD alternate functions.
7 PB9 bidirectional GPIO port B bit 9 with 5 V tolerant I/O; supports Timer, I2C1, SPI2, IR output, and LCD functions.
8 NRST bidirectional System reset input pin with internal weak pull-up resistor; asserts reset when driven low.
9 PC0 bidirectional GPIO port C bit 0 with ADC input IN1; supports LPUART, Timer, and low-power timer functions.
10 PC1 bidirectional GPIO port C bit 1 with ADC input IN2; supports SPI2, LPUART, and Timer alternate functions.
11 PC2 bidirectional GPIO port C bit 2 with ADC input IN3; supports SPI2 and low-power timer functions.
12 PC3 bidirectional GPIO port C bit 3 with ADC input IN4; supports SAI, SPI2, LCD VLCD drive, and low-power timer functions.
13 VREF+ power_in Positive reference voltage input for ADC and comparators; may be internally connected to VDDA in UFQFPN48.
14 VDDA power_in Analog supply voltage for ADC, comparators, and voltage reference buffer; 1.62 V to 3.6 V operating range.
15 PA0 bidirectional GPIO port A bit 0 with ADC input IN5 and comparator input; supports Timer2 and SAI functions.
16 PA1 bidirectional GPIO port A bit 1 with ADC input IN6 and comparator input; supports Timer2, I2C1, and SPI1 functions.
17 PA2 bidirectional GPIO port A bit 2 with ADC input IN7; supports LPUART TX, Quadspi NCS, and comparator output.
18 PA3 bidirectional GPIO port A bit 3 with ADC input IN8; supports LPUART RX, Quadspi CLK, and SAI functions.
19 PA4 bidirectional GPIO port A bit 4 with ADC input IN9 and comparator input; supports SPI1 and SAI functions.
20 PA5 bidirectional GPIO port A bit 5 with ADC input IN10 and comparator input; supports Timer2, SPI1, and SAI functions.
21 PA6 bidirectional GPIO port A bit 6 with ADC input IN11; supports Timer1, SPI1, LPUART, and Quadspi functions.
22 PA7 bidirectional GPIO port A bit 7 with ADC input IN12 and comparator output; supports Timer1, SPI1, and Quadspi functions.
23 PA8 bidirectional GPIO port A bit 8 with ADC input IN15; supports Timer1, USART1, LCD COM, and SAI functions.
24 PA9 bidirectional GPIO port A bit 9 with ADC input IN16 and comparator input; supports Timer1, I2C1, USART1, and SPI2.
25 PC4 bidirectional GPIO port C bit 4 with ADC input IN13 and comparator input; supports LCD segment function.
26 PC5 bidirectional GPIO port C bit 5 with ADC input IN14 and comparator input; supports wakeup from low-power modes.
27 PB2 bidirectional GPIO port B bit 2 with comparator input; supports RTC output, Timer, I2C, and SPI functions.
28 PB10 bidirectional GPIO port B bit 10 with comparator output; supports Timer2, I2C3, SPI2, LPUART, and Quadspi functions.
29 PB11 bidirectional GPIO port B bit 11 with comparator output; supports Timer2, I2C3, LPUART, and Quadspi functions.
30 VDD power_in Main supply voltage for core logic and peripherals; 1.71 V to 3.6 V operating range.
31 RF1 bidirectional RF input/output pin for 2.4 GHz antenna connection through low-pass matching network.
32 VSSRF power_in RF section ground; must be connected to ground plane for proper RF operation.
33 VDDRF power_in Dedicated RF supply voltage; 1.71 V to 3.6 V operating range.
34 OSC_OUT output 32 MHz crystal oscillator output for HSE high-speed external clock used by RF and CPU.
35 OSC_IN input 32 MHz crystal oscillator input; requires external 32 MHz crystal for HSE clock source.
36 AT0 output Reserved for production use as antenna tuning output; keep unconnected in user applications.
37 AT1 output Reserved for production use as antenna tuning output; keep unconnected in user applications.
38 PB0 bidirectional GPIO port B bit 0 with 3.6 V tolerant I/O; supports comparator output and external PA control.
39 PB1 bidirectional GPIO port B bit 1 with 3.6 V tolerant I/O; supports LPUART and low-power timer functions.
40 PE4 bidirectional GPIO port E bit 4 with general-purpose digital I/O and event output capability.
41 VFBSMPS power_in SMPS step-down converter feedback voltage input for voltage regulation feedback.
42 VSSSMPS power_in SMPS converter ground return for step-down converter switching current.
43 VLXSMPS power_in SMPS inductor output pin for switched step-down converter filtered output.
44 VDDSMPS power_in SMPS input supply voltage; must be connected to main VDD for step-down converter operation.
45 VDD power_in Main supply voltage for core logic and peripherals; 1.71 V to 3.6 V operating range.
46 PB12 bidirectional GPIO port B bit 12; supports Timer1, I2C3, SPI2, LPUART, and LCD segment functions.
47 PB13 bidirectional GPIO port B bit 13; supports Timer1, I2C3, SPI2, LPUART, and LCD segment functions.
48 PB14 bidirectional GPIO port B bit 14; supports Timer1, I2C3, SPI2, and LCD segment alternate functions.
49 PB15 bidirectional GPIO port B bit 15; supports Timer1, SPI2, RTC reference input, and LCD segment functions.
50 PC6 bidirectional GPIO port C bit 6; supports Touch Sensing, LCD segment, and Timer alternate functions.
51 PA10 bidirectional GPIO port A bit 10 with 5 V tolerant I/O; supports Timer1, I2C1, USART1, USB, and LCD functions.
52 PA11 bidirectional GPIO port A bit 11 with 5 V tolerant I/O and USB DM function; supports Timer1 and USB device.
53 PA12 bidirectional GPIO port A bit 12 with 5 V tolerant I/O and USB DP function; supports USART1 and LPUART.
54 PA13 (JTMS_SWDIO) bidirectional JTAG TMS or SWD data I/O pin with internal pull-up; can be used as GPIO with alternate functions.
55 VDDUSB power_in USB transceiver supply voltage; 3.0 V to 3.6 V when USB device is used.
56 PA14 (JTCK_SWCLK) bidirectional JTAG TCK or SWD clock pin with internal pull-down; can be used as GPIO with LCD and Timer functions.
57 PA15 (JTDI) bidirectional JTAG TDI pin with internal pull-up; can be used as GPIO with Timer2 and alternate functions.
58 PC10 bidirectional GPIO port C bit 10; supports Trace data, Touch Sensing, and LCD COM/segment functions.
59 PC11 bidirectional GPIO port C bit 11; supports Trace data, Touch Sensing, and LCD COM/segment functions.
60 PC12 bidirectional GPIO port C bit 12; supports RTC tamper/wakeup events and LCD COM/segment functions.
61 PD0 bidirectional GPIO port D bit 0; supports SPI2 NSS and Timer alternate functions.
62 PD1 bidirectional GPIO port D bit 1; supports SPI2 SCK and Timer alternate functions.
63 PB3 (JTDO) bidirectional JTAG TDO or Trace SWO pin with internal pull-up; can be used as GPIO with Timer2 and SAI functions.
64 PB4 (NJTRST) bidirectional JTAG NTRST pin with internal pull-up; can be used as GPIO with Timer17 BKIN and comparator input.
65 PB5 bidirectional GPIO port B bit 5; supports Timer1, I2C1, SPI1, USART1, LPUART, and Timer16 BKIN functions.
66 PB6 bidirectional GPIO port B bit 6 with 5 V tolerant I/O; supports Timer1, I2C1, USART1, and Timer16 functions.
67 PB7 bidirectional GPIO port B bit 7 with 5 V tolerant I/O and comparator input; supports Timer1, I2C1, USART1, and Timer17.
68 VDD power_in Main supply voltage for core logic and peripherals; 1.71 V to 3.6 V operating range.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package QFN-68-EP(8x8)
Category RF And Wireless
Pins 68

CAD (KiCad official)

  • Symbol: STM32WB55RGV6
  • Footprint: Package_DFN_QFN:QFN-68-1EP_8x8mm_P0.4mm_EP5.2x5.2mm
  • 3D model: QFN-68-EP(8x8) (KiCad packages3D, STEP)
  • 3D model files: stm32wb55rgv6-etched.step / stm32wb55rgv6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32wb55rgv6.step / stm32wb55rgv6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (172 pp, sha256 aa7e79c1edc21ddb, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF