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STM32L100R8T6A
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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STM32L100R8T6A
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32L100R8T6A from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VLCD | power_in | LCD controller supply pin (VLCD), whose rail decoupling is specified in Table 6 of the datasheet. |
| 2 | PC13-WKUP2 | bidirectional | 5 V tolerant (FT) I/O with default function PC13 and additional functions RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2. |
| 3 | PC14-OSC32_IN | bidirectional | Standard 3.3 V (TC) I/O with default function PC14, which becomes OSC32_IN only when the LSE oscillator is on (LSEON bit in RCC_CSR). |
| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V (TC) I/O with default function PC15, which becomes OSC32_OUT only when the LSE oscillator is on (LSEON bit in RCC_CSR). |
| 5 | PH0-OSC_IN | bidirectional | Standard 3.3 V (TC) I/O with default function PH0, which becomes OSC_IN only when the HSE oscillator is on (HSEON bit in RCC_CR). |
| 6 | PH1-OSC_OUT | bidirectional | Standard 3.3 V (TC) I/O with default function PH1, which becomes OSC_OUT only when the HSE oscillator is on (HSEON bit in RCC_CR). |
| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |
| 8 | PC0 | bidirectional | 5 V tolerant (FT) I/O with default function PC0, alternate function LCD_SEG18 and additional functions ADC_IN10 and COMP1_INP. |
| 9 | PC1 | bidirectional | 5 V tolerant (FT) I/O with default function PC1, alternate function LCD_SEG19 and additional functions ADC_IN11 and COMP1_INP. |
| 10 | PC2 | bidirectional | 5 V tolerant (FT) I/O with default function PC2, alternate function LCD_SEG20 and additional functions ADC_IN12 and COMP1_INP. |
| 11 | PC3 | bidirectional | Standard 3.3 V (TC) I/O with default function PC3, alternate function LCD_SEG21 and additional functions ADC_IN13 and COMP1_INP. |
| 12 | VSSA | power_in | Analog ground pin of the device. |
| 13 | VDDA | power_in | Analog supply pin of the device. |
| 14 | PA0-WKUP1 | bidirectional | 5 V tolerant (FT) I/O with default function PA0, alternate functions USART2_CTS and TIM2_CH1_ETR, and additional functions WKUP1, ADC_IN0 and COMP1_INP. |
| 15 | PA1 | bidirectional | 5 V tolerant (FT) I/O with default function PA1, alternate functions USART2_RTS, TIM2_CH2 and LCD_SEG0, and additional functions ADC_IN1 and COMP1_INP. |
| 16 | PA2 | bidirectional | 5 V tolerant (FT) I/O with default function PA2, alternate functions USART2_TX, TIM2_CH3, TIM9_CH1 and LCD_SEG1, and additional functions ADC_IN2 and COMP1_INP. |
| 17 | PA3 | bidirectional | Standard 3.3 V (TC) I/O with default function PA3, alternate functions USART2_RX, TIM2_CH4, TIM9_CH2 and LCD_SEG2, and additional functions ADC_IN3 and COMP1_INP. |
| 18 | VSS_4 | power_in | Digital ground pin of the device. |
| 19 | VDD_4 | power_in | Digital supply pin of the device. |
| 20 | PA4 | bidirectional | Standard 3.3 V (TC) I/O with default function PA4, alternate functions SPI1_NSS and USART2_CK, and additional functions ADC_IN4, DAC_OUT1 and COMP1_INP. |
| 21 | PA5 | bidirectional | Standard 3.3 V (TC) I/O with default function PA5, alternate functions SPI1_SCK and TIM2_CH1_ETR, and additional functions ADC_IN5, DAC_OUT2 and COMP1_INP. |
| 22 | PA6 | bidirectional | 5 V tolerant (FT) I/O with default function PA6, alternate functions SPI1_MISO, TIM3_CH1, LCD_SEG3 and TIM10_CH1, and additional functions ADC_IN6 and COMP1_INP. |
| 23 | PA7 | bidirectional | 5 V tolerant (FT) I/O with default function PA7, alternate functions SPI1_MOSI, TIM3_CH2, LCD_SEG4 and TIM11_CH1, and additional functions ADC_IN7 and COMP1_INP. |
| 24 | PC4 | bidirectional | 5 V tolerant (FT) I/O with default function PC4, alternate function LCD_SEG22 and additional functions ADC_IN14 and COMP1_INP. |
| 25 | PC5 | bidirectional | 5 V tolerant (FT) I/O with default function PC5, alternate function LCD_SEG23 and additional functions ADC_IN15 and COMP1_INP. |
| 26 | PB0 | bidirectional | Standard 3.3 V (TC) I/O with default function PB0, alternate functions TIM3_CH3 and LCD_SEG5, and additional functions ADC_IN8, COMP1_INP and VREF_OUT. |
| 27 | PB1 | bidirectional | 5 V tolerant (FT) I/O with default function PB1, alternate functions TIM3_CH4 and LCD_SEG6, and additional functions ADC_IN9, COMP1_INP and VREF_OUT. |
| 28 | PB2/BOOT1 | bidirectional | 5 V tolerant (FT) I/O with default function PB2/BOOT1, where BOOT1 is the additional function. |
| 29 | PB10 | bidirectional | 5 V tolerant (FT) I/O with default function PB10, alternate functions I2C2_SCL, USART3_TX, TIM2_CH3 and LCD_SEG10. |
| 30 | PB11 | bidirectional | 5 V tolerant (FT) I/O with default function PB11, alternate functions I2C2_SDA, USART3_RX, TIM2_CH4 and LCD_SEG11. |
| 31 | VSS_1 | power_in | Digital ground pin of the device. |
| 32 | VDD_1 | power_in | Digital supply pin of the device. |
| 33 | PB12 | bidirectional | 5 V tolerant (FT) I/O with default function PB12, alternate functions SPI2_NSS, I2C2_SMBA, USART3_CK, LCD_SEG12 and TIM10_CH1, and additional functions ADC_IN18 and COMP1_INP. |
| 34 | PB13 | bidirectional | 5 V tolerant (FT) I/O with default function PB13, alternate functions SPI2_SCK, USART3_CTS, LCD_SEG13 and TIM9_CH1, and additional functions ADC_IN19 and COMP1_INP. |
| 35 | PB14 | bidirectional | 5 V tolerant (FT) I/O with default function PB14, alternate functions SPI2_MISO, USART3_RTS, LCD_SEG14 and TIM9_CH2, and additional functions ADC_IN20 and COMP1_INP. |
| 36 | PB15 | bidirectional | 5 V tolerant (FT) I/O with default function PB15, alternate functions SPI2_MOSI, LCD_SEG15 and TIM11_CH1, and additional functions ADC_IN21, COMP1_INP and RTC_REFIN. |
| 37 | PC6 | bidirectional | 5 V tolerant (FT) I/O with default function PC6 and alternate functions TIM3_CH1 and LCD_SEG24. |
| 38 | PC7 | bidirectional | 5 V tolerant (FT) I/O with default function PC7 and alternate functions TIM3_CH2 and LCD_SEG25. |
| 39 | PC8 | bidirectional | 5 V tolerant (FT) I/O with default function PC8 and alternate functions TIM3_CH3 and LCD_SEG26. |
| 40 | PC9 | bidirectional | 5 V tolerant (FT) I/O with default function PC9 and alternate functions TIM3_CH4 and LCD_SEG27. |
| 41 | PA8 | bidirectional | 5 V tolerant (FT) I/O with default function PA8, alternate functions USART1_CK, MCO and LCD_COM0. |
| 42 | PA9 | bidirectional | 5 V tolerant (FT) I/O with default function PA9, alternate functions USART1_TX and LCD_COM1. |
| 43 | PA10 | bidirectional | 5 V tolerant (FT) I/O with default function PA10, alternate functions USART1_RX and LCD_COM2. |
| 44 | PA11 | bidirectional | 5 V tolerant (FT) I/O with default function PA11, alternate functions USART1_CTS and SPI1_MISO, and additional function USB_DM. |
| 45 | PA12 | bidirectional | 5 V tolerant (FT) I/O with default function PA12, alternate functions USART1_RTS and SPI1_MOSI, and additional function USB_DP. |
| 46 | PA13 | bidirectional | 5 V tolerant (FT) I/O with default function JTMS-SWDIO. |
| 47 | VSS_2 | power_in | Digital ground pin of the device. |
| 48 | VDD_2 | power_in | Digital supply pin of the device. |
| 49 | PA14 | bidirectional | 5 V tolerant (FT) I/O with default function JTCK-SWCLK. |
| 50 | PA15 | bidirectional | 5 V tolerant (FT) I/O with default function JTDI, alternate functions TIM2_CH1_ETR, PA15, SPI1_NSS and LCD_SEG17. |
| 51 | PC10 | bidirectional | 5 V tolerant (FT) I/O with default function PC10 and alternate functions USART3_TX, LCD_SEG28, LCD_SEG40 and LCD_COM4. |
| 52 | PC11 | bidirectional | 5 V tolerant (FT) I/O with default function PC11 and alternate functions USART3_RX, LCD_SEG29, LCD_SEG41 and LCD_COM5. |
| 53 | PC12 | bidirectional | 5 V tolerant (FT) I/O with default function PC12 and alternate functions USART3_CK, LCD_SEG30, LCD_SEG42 and LCD_COM6. |
| 54 | PD2 | bidirectional | 5 V tolerant (FT) I/O with default function PD2 and alternate functions TIM3_ETR, LCD_SEG31, LCD_SEG43 and LCD_COM7. |
| 55 | PB3 | bidirectional | 5 V tolerant (FT) I/O with default function JTDO, alternate functions TIM2_CH2, PB3, SPI1_SCK and LCD_SEG7, and additional function COMP2_INM. |
| 56 | PB4 | bidirectional | 5 V tolerant (FT) I/O with default function NJTRST, alternate functions TIM3_CH1, PB4, SPI1_MISO and LCD_SEG8, and additional function COMP2_INP. |
| 57 | PB5 | bidirectional | 5 V tolerant (FT) I/O with default function PB5, alternate functions I2C1_SMBA, TIM3_CH2, SPI1_MOSI and LCD_SEG9, and additional function COMP2_INP. |
| 58 | PB6 | bidirectional | 5 V tolerant (FT) I/O with default function PB6, alternate functions I2C1_SCL, TIM4_CH1 and USART1_TX. |
| 59 | PB7 | bidirectional | 5 V tolerant (FT) I/O with default function PB7, alternate functions I2C1_SDA, TIM4_CH2 and USART1_RX, and additional function PVD_IN. |
| 60 | BOOT0 | input | Dedicated BOOT0 input-only pin (structure B). |
| 61 | PB8 | bidirectional | 5 V tolerant (FT) I/O with default function PB8, alternate functions TIM4_CH3, I2C1_SCL, LCD_SEG16 and TIM10_CH1. |
| 62 | PB9 | bidirectional | 5 V tolerant (FT) I/O with default function PB9, alternate functions TIM4_CH4, I2C1_SDA, LCD_COM3 and TIM11_CH1. |
| 63 | VSS_3 | power_in | Digital ground pin of the device. |
| 64 | VDD_3 | power_in | Digital supply pin of the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L100R8T6A - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32l100r8t6a-etched.step/stm32l100r8t6a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l100r8t6a.step/stm32l100r8t6a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (103 pp, sha256
71adc9838950041a, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM32L100R8T6A
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32L100R8T6A from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VLCD | power_in | LCD controller supply pin (VLCD), whose rail decoupling is specified in Table 6 of the datasheet. |
| 2 | PC13-WKUP2 | bidirectional | 5 V tolerant (FT) I/O with default function PC13 and additional functions RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2. |
| 3 | PC14-OSC32_IN | bidirectional | Standard 3.3 V (TC) I/O with default function PC14, which becomes OSC32_IN only when the LSE oscillator is on (LSEON bit in RCC_CSR). |
| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V (TC) I/O with default function PC15, which becomes OSC32_OUT only when the LSE oscillator is on (LSEON bit in RCC_CSR). |
| 5 | PH0-OSC_IN | bidirectional | Standard 3.3 V (TC) I/O with default function PH0, which becomes OSC_IN only when the HSE oscillator is on (HSEON bit in RCC_CR). |
| 6 | PH1-OSC_OUT | bidirectional | Standard 3.3 V (TC) I/O with default function PH1, which becomes OSC_OUT only when the HSE oscillator is on (HSEON bit in RCC_CR). |
| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |
| 8 | PC0 | bidirectional | 5 V tolerant (FT) I/O with default function PC0, alternate function LCD_SEG18 and additional functions ADC_IN10 and COMP1_INP. |
| 9 | PC1 | bidirectional | 5 V tolerant (FT) I/O with default function PC1, alternate function LCD_SEG19 and additional functions ADC_IN11 and COMP1_INP. |
| 10 | PC2 | bidirectional | 5 V tolerant (FT) I/O with default function PC2, alternate function LCD_SEG20 and additional functions ADC_IN12 and COMP1_INP. |
| 11 | PC3 | bidirectional | Standard 3.3 V (TC) I/O with default function PC3, alternate function LCD_SEG21 and additional functions ADC_IN13 and COMP1_INP. |
| 12 | VSSA | power_in | Analog ground pin of the device. |
| 13 | VDDA | power_in | Analog supply pin of the device. |
| 14 | PA0-WKUP1 | bidirectional | 5 V tolerant (FT) I/O with default function PA0, alternate functions USART2_CTS and TIM2_CH1_ETR, and additional functions WKUP1, ADC_IN0 and COMP1_INP. |
| 15 | PA1 | bidirectional | 5 V tolerant (FT) I/O with default function PA1, alternate functions USART2_RTS, TIM2_CH2 and LCD_SEG0, and additional functions ADC_IN1 and COMP1_INP. |
| 16 | PA2 | bidirectional | 5 V tolerant (FT) I/O with default function PA2, alternate functions USART2_TX, TIM2_CH3, TIM9_CH1 and LCD_SEG1, and additional functions ADC_IN2 and COMP1_INP. |
| 17 | PA3 | bidirectional | Standard 3.3 V (TC) I/O with default function PA3, alternate functions USART2_RX, TIM2_CH4, TIM9_CH2 and LCD_SEG2, and additional functions ADC_IN3 and COMP1_INP. |
| 18 | VSS_4 | power_in | Digital ground pin of the device. |
| 19 | VDD_4 | power_in | Digital supply pin of the device. |
| 20 | PA4 | bidirectional | Standard 3.3 V (TC) I/O with default function PA4, alternate functions SPI1_NSS and USART2_CK, and additional functions ADC_IN4, DAC_OUT1 and COMP1_INP. |
| 21 | PA5 | bidirectional | Standard 3.3 V (TC) I/O with default function PA5, alternate functions SPI1_SCK and TIM2_CH1_ETR, and additional functions ADC_IN5, DAC_OUT2 and COMP1_INP. |
| 22 | PA6 | bidirectional | 5 V tolerant (FT) I/O with default function PA6, alternate functions SPI1_MISO, TIM3_CH1, LCD_SEG3 and TIM10_CH1, and additional functions ADC_IN6 and COMP1_INP. |
| 23 | PA7 | bidirectional | 5 V tolerant (FT) I/O with default function PA7, alternate functions SPI1_MOSI, TIM3_CH2, LCD_SEG4 and TIM11_CH1, and additional functions ADC_IN7 and COMP1_INP. |
| 24 | PC4 | bidirectional | 5 V tolerant (FT) I/O with default function PC4, alternate function LCD_SEG22 and additional functions ADC_IN14 and COMP1_INP. |
| 25 | PC5 | bidirectional | 5 V tolerant (FT) I/O with default function PC5, alternate function LCD_SEG23 and additional functions ADC_IN15 and COMP1_INP. |
| 26 | PB0 | bidirectional | Standard 3.3 V (TC) I/O with default function PB0, alternate functions TIM3_CH3 and LCD_SEG5, and additional functions ADC_IN8, COMP1_INP and VREF_OUT. |
| 27 | PB1 | bidirectional | 5 V tolerant (FT) I/O with default function PB1, alternate functions TIM3_CH4 and LCD_SEG6, and additional functions ADC_IN9, COMP1_INP and VREF_OUT. |
| 28 | PB2/BOOT1 | bidirectional | 5 V tolerant (FT) I/O with default function PB2/BOOT1, where BOOT1 is the additional function. |
| 29 | PB10 | bidirectional | 5 V tolerant (FT) I/O with default function PB10, alternate functions I2C2_SCL, USART3_TX, TIM2_CH3 and LCD_SEG10. |
| 30 | PB11 | bidirectional | 5 V tolerant (FT) I/O with default function PB11, alternate functions I2C2_SDA, USART3_RX, TIM2_CH4 and LCD_SEG11. |
| 31 | VSS_1 | power_in | Digital ground pin of the device. |
| 32 | VDD_1 | power_in | Digital supply pin of the device. |
| 33 | PB12 | bidirectional | 5 V tolerant (FT) I/O with default function PB12, alternate functions SPI2_NSS, I2C2_SMBA, USART3_CK, LCD_SEG12 and TIM10_CH1, and additional functions ADC_IN18 and COMP1_INP. |
| 34 | PB13 | bidirectional | 5 V tolerant (FT) I/O with default function PB13, alternate functions SPI2_SCK, USART3_CTS, LCD_SEG13 and TIM9_CH1, and additional functions ADC_IN19 and COMP1_INP. |
| 35 | PB14 | bidirectional | 5 V tolerant (FT) I/O with default function PB14, alternate functions SPI2_MISO, USART3_RTS, LCD_SEG14 and TIM9_CH2, and additional functions ADC_IN20 and COMP1_INP. |
| 36 | PB15 | bidirectional | 5 V tolerant (FT) I/O with default function PB15, alternate functions SPI2_MOSI, LCD_SEG15 and TIM11_CH1, and additional functions ADC_IN21, COMP1_INP and RTC_REFIN. |
| 37 | PC6 | bidirectional | 5 V tolerant (FT) I/O with default function PC6 and alternate functions TIM3_CH1 and LCD_SEG24. |
| 38 | PC7 | bidirectional | 5 V tolerant (FT) I/O with default function PC7 and alternate functions TIM3_CH2 and LCD_SEG25. |
| 39 | PC8 | bidirectional | 5 V tolerant (FT) I/O with default function PC8 and alternate functions TIM3_CH3 and LCD_SEG26. |
| 40 | PC9 | bidirectional | 5 V tolerant (FT) I/O with default function PC9 and alternate functions TIM3_CH4 and LCD_SEG27. |
| 41 | PA8 | bidirectional | 5 V tolerant (FT) I/O with default function PA8, alternate functions USART1_CK, MCO and LCD_COM0. |
| 42 | PA9 | bidirectional | 5 V tolerant (FT) I/O with default function PA9, alternate functions USART1_TX and LCD_COM1. |
| 43 | PA10 | bidirectional | 5 V tolerant (FT) I/O with default function PA10, alternate functions USART1_RX and LCD_COM2. |
| 44 | PA11 | bidirectional | 5 V tolerant (FT) I/O with default function PA11, alternate functions USART1_CTS and SPI1_MISO, and additional function USB_DM. |
| 45 | PA12 | bidirectional | 5 V tolerant (FT) I/O with default function PA12, alternate functions USART1_RTS and SPI1_MOSI, and additional function USB_DP. |
| 46 | PA13 | bidirectional | 5 V tolerant (FT) I/O with default function JTMS-SWDIO. |
| 47 | VSS_2 | power_in | Digital ground pin of the device. |
| 48 | VDD_2 | power_in | Digital supply pin of the device. |
| 49 | PA14 | bidirectional | 5 V tolerant (FT) I/O with default function JTCK-SWCLK. |
| 50 | PA15 | bidirectional | 5 V tolerant (FT) I/O with default function JTDI, alternate functions TIM2_CH1_ETR, PA15, SPI1_NSS and LCD_SEG17. |
| 51 | PC10 | bidirectional | 5 V tolerant (FT) I/O with default function PC10 and alternate functions USART3_TX, LCD_SEG28, LCD_SEG40 and LCD_COM4. |
| 52 | PC11 | bidirectional | 5 V tolerant (FT) I/O with default function PC11 and alternate functions USART3_RX, LCD_SEG29, LCD_SEG41 and LCD_COM5. |
| 53 | PC12 | bidirectional | 5 V tolerant (FT) I/O with default function PC12 and alternate functions USART3_CK, LCD_SEG30, LCD_SEG42 and LCD_COM6. |
| 54 | PD2 | bidirectional | 5 V tolerant (FT) I/O with default function PD2 and alternate functions TIM3_ETR, LCD_SEG31, LCD_SEG43 and LCD_COM7. |
| 55 | PB3 | bidirectional | 5 V tolerant (FT) I/O with default function JTDO, alternate functions TIM2_CH2, PB3, SPI1_SCK and LCD_SEG7, and additional function COMP2_INM. |
| 56 | PB4 | bidirectional | 5 V tolerant (FT) I/O with default function NJTRST, alternate functions TIM3_CH1, PB4, SPI1_MISO and LCD_SEG8, and additional function COMP2_INP. |
| 57 | PB5 | bidirectional | 5 V tolerant (FT) I/O with default function PB5, alternate functions I2C1_SMBA, TIM3_CH2, SPI1_MOSI and LCD_SEG9, and additional function COMP2_INP. |
| 58 | PB6 | bidirectional | 5 V tolerant (FT) I/O with default function PB6, alternate functions I2C1_SCL, TIM4_CH1 and USART1_TX. |
| 59 | PB7 | bidirectional | 5 V tolerant (FT) I/O with default function PB7, alternate functions I2C1_SDA, TIM4_CH2 and USART1_RX, and additional function PVD_IN. |
| 60 | BOOT0 | input | Dedicated BOOT0 input-only pin (structure B). |
| 61 | PB8 | bidirectional | 5 V tolerant (FT) I/O with default function PB8, alternate functions TIM4_CH3, I2C1_SCL, LCD_SEG16 and TIM10_CH1. |
| 62 | PB9 | bidirectional | 5 V tolerant (FT) I/O with default function PB9, alternate functions TIM4_CH4, I2C1_SDA, LCD_COM3 and TIM11_CH1. |
| 63 | VSS_3 | power_in | Digital ground pin of the device. |
| 64 | VDD_3 | power_in | Digital supply pin of the device. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
## CAD (KiCad official)
- Symbol: `STM32L100R8T6A`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `stm32l100r8t6a-etched.step` / `stm32l100r8t6a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l100r8t6a.step` / `stm32l100r8t6a.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923200742416384) (103 pp, sha256 `71adc9838950041a`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm32l100r8t6a-datasheet.pdf)