STM32L031K6U3TR

{
  "slug": "stm32l031k6u3tr",
  "version": "0.1.0",
  "type": "component",
  "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "stm32l031k6u3tr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "stm32l031k6u3tr.kicad_sym",
    "stm32l031k6u3tr.kicad_mod",
    "stm32l031k6u3tr.glb",
    "stm32l031k6u3tr.step",
    "stm32l031k6u3tr.lbr",
    "docs/hero.png",
    "docs/stm32l031k6u3tr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "stm32l031k6u3tr-hero.glb",
    "stm32l031k6u3tr-hero.overlay.json"
  ],
  "component": {
    "mpn": "STM32L031K6U3TR",
    "manufacturer": "STMicroelectronics",
    "package": "UFQFPN-32(5x5)",
    "pin_count": 33,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942557811892224",
    "parts": {
      "symbol": "stm32l031k6u3tr.kicad_sym",
      "footprint": "stm32l031k6u3tr.kicad_mod",
      "model_3d": "stm32l031k6u3tr-hero.glb",
      "model_3d_plain": "stm32l031k6u3tr.glb",
      "model_3d_step": "stm32l031k6u3tr-etched.step",
      "model_3d_step_plain": "stm32l031k6u3tr.step",
      "lbr": "stm32l031k6u3tr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2055137",
      "digikey": "STM32L031K6U3TR-ND",
      "mouser": "511-STM32L031K6U3TR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T14:57:19Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "STM32L031K6U3TR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "511-STM32L031K6U3TR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital supply pin; the device power supply range is stated as 1.65 V to 3.6 V."
      },
      {
        "number": "2",
        "name": "PC14",
        "type": "bidirectional",
        "description": "Standard 3.3 V I/O (TC structure) listed with OSC32_IN as its alternate function, and floating input during and after reset unless otherwise noted."
      },
      {
        "number": "3",
        "name": "PC15",
        "type": "bidirectional",
        "description": "Standard 3.3 V I/O (TC structure) listed with OSC32_OUT as its alternate function, and floating input during and after reset unless otherwise noted."
      },
      {
        "number": "4",
        "name": "NRST",
        "type": "bidirectional",
        "description": "Bidirectional reset pin with an embedded weak pull-up resistor."
      },
      {
        "number": "5",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog supply pin; VDDA minimum is 1.65 V in the general operating conditions."
      },
      {
        "number": "6",
        "name": "PA0",
        "type": "bidirectional",
        "description": "Standard 3.3 V I/O (TC structure) listed in the pin table with CK_IN as the function after reset, with additional functions ADC_IN0, COMP1_INM6 and RTC_TAMP2/WKUP1."
      },
      {
        "number": "7",
        "name": "PA1",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with additional functions ADC_IN1 and COMP1_INP."
      },
      {
        "number": "8",
        "name": "PA2",
        "type": "bidirectional",
        "description": "Standard 3.3 V I/O (TC structure) with alternate functions including USART2_TX and LPUART1_TX, and additional function ADC_IN2."
      },
      {
        "number": "9",
        "name": "PA3",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including USART2_RX and LPUART1_RX, and additional function ADC_IN3."
      },
      {
        "number": "10",
        "name": "PA4",
        "type": "bidirectional",
        "description": "Standard 3.3 V I/O (TC structure) with alternate functions including SPI1_NSS and USART2_CK, and additional function ADC_IN4."
      },
      {
        "number": "11",
        "name": "PA5",
        "type": "bidirectional",
        "description": "Standard 3.3 V I/O (TC structure) with alternate functions including SPI1_SCK and TIM2_CH1, and additional function ADC_IN5."
      },
      {
        "number": "12",
        "name": "PA6",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SPI1_MISO and LPUART1_CTS, and additional function ADC_IN6."
      },
      {
        "number": "13",
        "name": "PA7",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SPI1_MOSI and USART2_CTS, and additional function ADC_IN7."
      },
      {
        "number": "14",
        "name": "PB0",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SPI1_MISO and TIM2_CH3, and additional functions ADC_IN8 and VREF_OUT."
      },
      {
        "number": "15",
        "name": "PB1",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including USART2_CK and LPUART1_RTS/LPUART1_DE, and additional functions ADC_IN9 and VREF_OUT."
      },
      {
        "number": "16",
        "name": "PB2",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate function LPTIM1_OUT."
      },
      {
        "number": "17",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital supply pin; the device power supply range is stated as 1.65 V to 3.6 V."
      },
      {
        "number": "18",
        "name": "PA8",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including MCO, LPTIM1_IN1 and USART2_CK."
      },
      {
        "number": "19",
        "name": "PA9",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FTf structure) with Fm+ capability and alternate functions including MCO, I2C1_SCL and USART2_TX."
      },
      {
        "number": "20",
        "name": "PA10",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FTf structure) with Fm+ capability and alternate functions including I2C1_SDA and USART2_RX."
      },
      {
        "number": "21",
        "name": "PA11",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SPI1_MISO and USART2_CTS, and additional function COMP1_OUT."
      },
      {
        "number": "22",
        "name": "PA12",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SPI1_MOSI and USART2_RTS/USART2_DE, and additional function COMP2_OUT."
      },
      {
        "number": "23",
        "name": "PA13",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions SWDIO, LPTIM1_ETR and LPUART1_RX."
      },
      {
        "number": "24",
        "name": "PA14",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SWCLK, LPTIM1_OUT and USART2_TX."
      },
      {
        "number": "25",
        "name": "PA15",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SPI1_NSS, TIM2_ETR and USART2_RX."
      },
      {
        "number": "26",
        "name": "PB3",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SPI1_SCK and TIM2_CH2, and additional function COMP2_INN."
      },
      {
        "number": "27",
        "name": "PB4",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SPI1_MISO and TIM22_CH1, and additional function COMP2_INP."
      },
      {
        "number": "28",
        "name": "PB5",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FT structure) with alternate functions including SPI1_MOSI, LPTIM1_IN1 and I2C1_SMBA, and additional function COMP2_INP."
      },
      {
        "number": "29",
        "name": "PB6",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FTf structure) with Fm+ capability and alternate functions including USART2_TX, I2C1_SCL and LPTIM1_ETR."
      },
      {
        "number": "30",
        "name": "PB7",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FTf structure) with Fm+ capability and alternate functions including USART2_RX, I2C1_SDA and LPTIM1_IN2, and additional functions COMP2_INP and VREF_PVD_IN."
      },
      {
        "number": "31",
        "name": "BOOT0",
        "type": "input",
        "description": "Dedicated BOOT0 boot-mode input pin (input only)."
      },
      {
        "number": "32",
        "name": "PB8",
        "type": "bidirectional",
        "description": "5 V tolerant I/O (FTf structure) with Fm+ capability and alternate function I2C1_SCL."
      },
      {
        "number": "33",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: UFQFPN32 exposed pad: Table 15 footnote 1 says the VSS pins are connected to the exposed pad, but th; Table 15 VSSA row has an unnumbered '0' entry in the UFQFPN32 column. Pins 1 to 32 are all accounted; Pin 6 is printed as 'PA0-CK_IN' in Table 15. The name is recorded as PA0 and CK_IN is mentioned in t",
          "exposed pad 33 added from the footprint"
        ],
        "pages_sent": 59,
        "cost_usd": 0.2497,
        "at": "2026-10-08T14:56:58"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942557811892224",
        "pages": 126,
        "sha256": "9726c48418e03f62",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "stm32l031k6u3tr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "90af021df1253eae35bee4f4a4f9ba63bcf4a308f6e9f12d58f6e00181c23140",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "stm32l031k6u3tr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97141174b9b940765b78f000ea5b4e599201c2817d87442e37310f71ba1dba3f",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}