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STM32L031K6U3TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32L031K6U3TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)

STM32L031K6U3TR from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital supply pin; the device power supply range is stated as 1.65 V to 3.6 V.
2 PC14 bidirectional Standard 3.3 V I/O (TC structure) listed with OSC32_IN as its alternate function, and floating input during and after reset unless otherwise noted.
3 PC15 bidirectional Standard 3.3 V I/O (TC structure) listed with OSC32_OUT as its alternate function, and floating input during and after reset unless otherwise noted.
4 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
5 VDDA power_in Analog supply pin; VDDA minimum is 1.65 V in the general operating conditions.
6 PA0 bidirectional Standard 3.3 V I/O (TC structure) listed in the pin table with CK_IN as the function after reset, with additional functions ADC_IN0, COMP1_INM6 and RTC_TAMP2/WKUP1.
7 PA1 bidirectional 5 V tolerant I/O (FT structure) with additional functions ADC_IN1 and COMP1_INP.
8 PA2 bidirectional Standard 3.3 V I/O (TC structure) with alternate functions including USART2_TX and LPUART1_TX, and additional function ADC_IN2.
9 PA3 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including USART2_RX and LPUART1_RX, and additional function ADC_IN3.
10 PA4 bidirectional Standard 3.3 V I/O (TC structure) with alternate functions including SPI1_NSS and USART2_CK, and additional function ADC_IN4.
11 PA5 bidirectional Standard 3.3 V I/O (TC structure) with alternate functions including SPI1_SCK and TIM2_CH1, and additional function ADC_IN5.
12 PA6 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SPI1_MISO and LPUART1_CTS, and additional function ADC_IN6.
13 PA7 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SPI1_MOSI and USART2_CTS, and additional function ADC_IN7.
14 PB0 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SPI1_MISO and TIM2_CH3, and additional functions ADC_IN8 and VREF_OUT.
15 PB1 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including USART2_CK and LPUART1_RTS/LPUART1_DE, and additional functions ADC_IN9 and VREF_OUT.
16 PB2 bidirectional 5 V tolerant I/O (FT structure) with alternate function LPTIM1_OUT.
17 VDD power_in Digital supply pin; the device power supply range is stated as 1.65 V to 3.6 V.
18 PA8 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including MCO, LPTIM1_IN1 and USART2_CK.
19 PA9 bidirectional 5 V tolerant I/O (FTf structure) with Fm+ capability and alternate functions including MCO, I2C1_SCL and USART2_TX.
20 PA10 bidirectional 5 V tolerant I/O (FTf structure) with Fm+ capability and alternate functions including I2C1_SDA and USART2_RX.
21 PA11 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SPI1_MISO and USART2_CTS, and additional function COMP1_OUT.
22 PA12 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SPI1_MOSI and USART2_RTS/USART2_DE, and additional function COMP2_OUT.
23 PA13 bidirectional 5 V tolerant I/O (FT structure) with alternate functions SWDIO, LPTIM1_ETR and LPUART1_RX.
24 PA14 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SWCLK, LPTIM1_OUT and USART2_TX.
25 PA15 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SPI1_NSS, TIM2_ETR and USART2_RX.
26 PB3 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SPI1_SCK and TIM2_CH2, and additional function COMP2_INN.
27 PB4 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SPI1_MISO and TIM22_CH1, and additional function COMP2_INP.
28 PB5 bidirectional 5 V tolerant I/O (FT structure) with alternate functions including SPI1_MOSI, LPTIM1_IN1 and I2C1_SMBA, and additional function COMP2_INP.
29 PB6 bidirectional 5 V tolerant I/O (FTf structure) with Fm+ capability and alternate functions including USART2_TX, I2C1_SCL and LPTIM1_ETR.
30 PB7 bidirectional 5 V tolerant I/O (FTf structure) with Fm+ capability and alternate functions including USART2_RX, I2C1_SDA and LPTIM1_IN2, and additional functions COMP2_INP and VREF_PVD_IN.
31 BOOT0 input Dedicated BOOT0 boot-mode input pin (input only).
32 PB8 bidirectional 5 V tolerant I/O (FTf structure) with Fm+ capability and alternate function I2C1_SCL.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-32(5x5)
Category Embedded Processors & Controllers
Pins 33

CAD (KiCad official)

  • Symbol: STM32L031K6U3TR
  • Footprint: Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm
  • 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: stm32l031k6u3tr-etched.step / stm32l031k6u3tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l031k6u3tr.step / stm32l031k6u3tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (126 pp, sha256 9726c48418e03f62, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF