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STM32G474RET6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32G474RET6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32G474RET6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup supply for the RTC, LSE 32 kHz crystal, and backup registers (~1.55-3.6 V). Powered from a coin cell or dedicated backup rail; can be tied to VDD if the backup domain is not used.
2 PC13 bidirectional Reset-state general-purpose I/O (5 V tolerant FT). Additional functions include WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT1; alternate functions include TIM1_BKIN, TIM1_CH1N, TIM8_CH4N, EVENTOUT.
3 PC14-OSC32_IN bidirectional GPIO PC14 by default (FT, 5 V tolerant); additional function is OSC32_IN input for the 32.768 kHz LSE crystal.
4 PC15-OSC32_OUT bidirectional GPIO PC15 by default (FT, 5 V tolerant); additional function is OSC32_OUT output for the 32.768 kHz LSE crystal.
5 PF0-OSC_IN bidirectional GPIO PF0 by default (FT_fa, 5 V tolerant, Fm+ and analog switch); additional function is OSC_IN input for the main HSE 4-48 MHz crystal, also ADC1_IN10.
6 PF1-OSC_OUT bidirectional GPIO PF1 by default (FT_a, 5 V tolerant, analog switch); additional function is OSC_OUT for the main HSE crystal, also ADC2_IN10, COMP3_INM.
7 PG10-NRST bidirectional Bidirectional device reset with internal weak pull-up (~40 kΩ). Drive low >20 µs to reset. Also usable as GPIO PG10 (FT) when NRST function disabled by option byte; alternate MCO/EVENTOUT.
8 PC0 bidirectional GPIO (FT_a, 5 V tolerant, analog switch). Additional: ADC12_IN6, COMP3_INM. Alternate: LPTIM1_IN1, TIM1_CH1, LPUART1_RX, EVENTOUT.
9 PC1 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC12_IN7, COMP3_INP. Alternate: LPTIM1_OUT, TIM1_CH2, LPUART1_TX, QUADSPI1_BK2_IO0, SAI1_SD_A, EVENTOUT.
10 PC2 bidirectional GPIO (FT_a, 5 V tolerant, analog switch). Additional: ADC12_IN8. Alternate: LPTIM1_IN2, TIM1_CH3, COMP3_OUT, TIM20_CH2, QUADSPI1_BK2_IO1, EVENTOUT.
11 PC3 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC12_IN9, OPAMP5_VINP. Alternate: LPTIM1_ETR, TIM1_CH4, SAI1_D1, TIM1_BKIN2, QUADSPI1_BK2_IO2, SAI1_SD_A, EVENTOUT.
12 PA0 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC12_IN1, COMP1_INM, COMP3_INP, RTC_TAMP2, WKUP1. Alternate: TIM2_CH1, TIM5_CH1, USART2_CTS, COMP1_OUT, TIM8_BKIN, TIM8_ETR, TIM2_ETR, EVENTOUT.
13 PA1 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC12_IN2, COMP1_INP, OPAMP1_VINP, OPAMP3_VINP, OPAMP6_VINM. Alternate: RTC_REFIN, TIM2_CH2, TIM5_CH2, USART2_RTS_DE, TIM15_CH1N, EVENTOUT.
14 PA2 bidirectional GPIO (FT_a, 5 V tolerant, analog switch). Additional: ADC1_IN3, COMP2_INM, OPAMP1_VOUT, WKUP4/LSCO. Alternate: TIM2_CH3, TIM5_CH3, USART2_TX, COMP2_OUT, TIM15_CH1, QUADSPI1_BK1_NCS, LPUART1_TX, UCPD1_FRSTX, EVENTOUT.
15 VSS power_in Digital ground reference (0 V). Bond to solid ground plane.
16 VDD power_in Digital supply, 1.71-3.6 V. Decouple locally with a 100 nF capacitor.
17 PA3 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC1_IN4, COMP2_INP, OPAMP1_VINM/OPAMP1_VINP, OPAMP5_VINM. Alternate: TIM2_CH4, TIM5_CH4, SAI1_CK1, USART2_RX, TIM15_CH2, QUADSPI1_CLK, LPUART1_RX, SAI1_MCLK_A, EVENTOUT.
18 PA4 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC2_IN17, DAC1_OUT1, COMP1_INM. Alternate: TIM3_CH2, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, SAI1_FS_B, EVENTOUT.
19 PA5 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC2_IN13, DAC1_OUT2, COMP2_INM, OPAMP2_VINM. Alternate: TIM2_CH1, TIM2_ETR, SPI1_SCK, UCPD1_FRSTX, EVENTOUT.
20 PA6 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC2_IN3, DAC2_OUT1, OPAMP2_VOUT. Alternate: TIM16_CH1, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM1_BKIN, COMP1_OUT, QUADSPI1_BK1_IO3, LPUART1_CTS, EVENTOUT.
21 PA7 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC2_IN4, COMP2_INP, OPAMP1_VINP, OPAMP2_VINP. Alternate: TIM17_CH1, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM1_CH1N, COMP2_OUT, QUADSPI1_BK1_IO2, UCPD1_FRSTX, EVENTOUT.
22 PC4 bidirectional GPIO (FT_fa, 5 V tolerant, Fm+ and analog switch). Additional: ADC2_IN5. Alternate: TIM1_ETR, I2C2_SCL, USART1_TX, QUADSPI1_BK2_IO3, EVENTOUT.
23 PC5 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC2_IN11, OPAMP1_VINM, OPAMP2_VINM, WKUP5. Alternate: TIM15_BKIN, SAI1_D3, TIM1_CH4N, USART1_RX, HRTIM1_EEV10, EVENTOUT.
24 PB0 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC3_IN12/ADC1_IN15, COMP4_INP, OPAMP2_VINP, OPAMP3_VINP. Alternate: TIM3_CH3, TIM8_CH2N, TIM1_CH2N, QUADSPI1_BK1_IO1, HRTIM1_FLT5, UCPD1_FRSTX, EVENTOUT.
25 PB1 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC3_IN1/ADC1_IN12, COMP1_INP, OPAMP3_VOUT, OPAMP6_VINM. Alternate: TIM3_CH4, TIM8_CH3N, TIM1_CH3N, COMP4_OUT, QUADSPI1_BK1_IO0, LPUART1_RTS_DE, HRTIM1_SCOUT, EVENTOUT.
26 PB2 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC2_IN12, COMP4_INM, OPAMP3_VINM. Alternate: RTC_OUT2, LPTIM1_OUT, TIM5_CH1, TIM20_CH1, I2C3_SMBA, QUADSPI1_BK2_IO1, HRTIM1_SCIN, EVENTOUT.
27 VSSA power_in Analog ground reference for ADCs, DACs, comparators, op-amps and VREFBUF. Tie to VSS with a clean star topology.
28 VREF+ power_in External positive reference voltage for the ADCs and DACs (or VREFBUF output when the internal buffer is enabled). Range typically 2.0 V to VDDA. Additional function: VREFBUF_OUT.
29 VDDA power_in Analog supply for ADCs, DACs, comparators, op-amps, VREFBUF and reset block, 1.62-3.6 V. Must be ≥ VDD and separately decoupled.
30 PB10 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: COMP5_INM, OPAMP3_VINM, OPAMP4_VINM. Alternate: TIM2_CH3, USART3_TX, LPUART1_RX, QUADSPI1_CLK, TIM1_BKIN, HRTIM1_FLT3, SAI1_SCK_A, EVENTOUT.
31 VSS power_in Digital ground reference (0 V).
32 VDD power_in Digital supply, 1.71-3.6 V. Local 100 nF decoupling required.
33 PB11 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC12_IN14, COMP6_INP, OPAMP4_VINP, OPAMP6_VOUT. Alternate: TIM2_CH4, USART3_RX, LPUART1_TX, QUADSPI1_BK1_NCS, HRTIM1_FLT4, EVENTOUT.
34 PB12 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC4_IN3/ADC1_IN11, COMP7_INM, OPAMP4_VOUT, OPAMP6_VINP. Alternate: TIM5_ETR, I2C2_SMBA, SPI2_NSS/I2S2_WS, TIM1_BKIN, USART3_CK, LPUART1_RTS_DE, FDCAN2_RX, HRTIM1_CHC1, EVENTOUT.
35 PB13 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC3_IN5, COMP5_INP, OPAMP3_VINP, OPAMP4_VINP, OPAMP6_VINP. Alternate: SPI2_SCK/I2S2_CK, TIM1_CH1N, USART3_CTS, LPUART1_CTS, FDCAN2_TX, HRTIM1_CHC2, EVENTOUT.
36 PB14 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC4_IN4/ADC1_IN5, COMP7_INP, OPAMP2_VINP, OPAMP5_VINP. Alternate: TIM15_CH1, SPI2_MISO, TIM1_CH2N, USART3_RTS_DE, COMP4_OUT, HRTIM1_CHD1, EVENTOUT.
37 PB15 bidirectional GPIO (TT_a, 3.6 V tolerant, analog switch). Additional: ADC4_IN5/ADC2_IN15, COMP6_INM, OPAMP5_VINM. Alternate: RTC_REFIN, TIM15_CH2, TIM15_CH1N, COMP3_OUT, TIM1_CH3N, SPI2_MOSI/I2S2_SD, HRTIM1_CHD2, EVENTOUT.
38 PC6 bidirectional GPIO (FT_f, 5 V tolerant, Fm+). Alternate: TIM3_CH1, HRTIM1_EEV10, TIM8_CH1, I2S2_MCK, COMP6_OUT, I2C4_SCL, HRTIM1_CHF1, EVENTOUT.
39 PC7 bidirectional GPIO (FT_f, 5 V tolerant, Fm+). Alternate: TIM3_CH2, HRTIM1_FLT5, TIM8_CH2, I2S3_MCK, COMP5_OUT, I2C4_SDA, HRTIM1_CHF2, EVENTOUT.
40 PC8 bidirectional GPIO (FT_f, 5 V tolerant, Fm+). Alternate: TIM3_CH3, HRTIM1_CHE1, TIM8_CH3, TIM20_CH3, COMP7_OUT, I2C3_SCL, EVENTOUT.
41 PC9 bidirectional GPIO (FT_f, 5 V tolerant, Fm+). Alternate: TIM3_CH4, HRTIM1_CHE2, TIM8_CH4, I2SCKIN, TIM8_BKIN2, I2C3_SDA, EVENTOUT.
42 PA8 bidirectional GPIO (FT_a, 5 V tolerant, analog switch). Additional: ADC5_IN1, OPAMP5_VOUT. Alternate: MCO, I2C3_SCL, I2C2_SDA, I2S2_MCK, TIM1_CH1, USART1_CK, COMP7_OUT, TIM4_ETR, FDCAN3_RX, SAI1_CK2, HRTIM1_CHA1, SAI1_SCK_A, EVENTOUT.
43 PA9 bidirectional GPIO (FT_fda, 5 V tolerant, Fm+, USB-C dead-battery, analog switch). Additional: ADC5_IN2, UCPD1_DBCC1. Alternate: I2C3_SMBA, I2C2_SCL, I2S3_MCK, TIM1_CH2, USART1_TX, COMP5_OUT, TIM15_BKIN, TIM2_CH3, HRTIM1_CHA2, SAI1_FS_A, EVENTOUT.
44 PA10 bidirectional GPIO (FT_fda, 5 V tolerant, Fm+, USB-C dead-battery, analog switch). Additional: UCPD1_DBCC2. Alternate: TIM17_BKIN, USB_CRS_SYNC, I2C2_SMBA, SPI2_MISO, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4, TIM8_BKIN, SAI1_D1, HRTIM1_CHB1, SAI1_SD_A, EVENTOUT.
45 PA11 bidirectional GPIO with USB function (FT_u, 5 V tolerant). Additional: USB_DM (D-). Alternate: SPI2_MOSI/I2S2_SD, TIM1_CH1N, USART1_CTS, COMP1_OUT, FDCAN1_RX, TIM4_CH1, TIM1_CH4, TIM1_BKIN2, HRTIM1_CHB2, EVENTOUT.
46 PA12 bidirectional GPIO with USB function (FT_u, 5 V tolerant). Additional: USB_DP (D+). Alternate: TIM16_CH1, I2SCKIN, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, FDCAN1_TX, TIM4_CH2, TIM1_ETR, HRTIM1_FLT1, EVENTOUT.
47 VSS power_in Digital ground reference (0 V).
48 VDD power_in Digital supply, 1.71-3.6 V. Local 100 nF decoupling required.
49 PA13 bidirectional SWDIO / JTMS in reset state (FT_f, 5 V tolerant, Fm+). Alternate: SWDIO-JTMS, TIM16_CH1N, I2C4_SCL, I2C1_SCL, IR_OUT, USART3_CTS, TIM4_CH3, SAI1_SD_B, EVENTOUT.
50 PA14 bidirectional SWCLK / JTCK in reset state (FT_f, 5 V tolerant, Fm+). Alternate: SWCLK-JTCK, LPTIM1_OUT, I2C4_SMBA, I2C1_SDA, TIM8_CH2, TIM1_BKIN, USART2_TX, SAI1_FS_B, EVENTOUT.
51 PA15 bidirectional JTDI in reset state (FT_f, 5 V tolerant, Fm+). Alternate: JTDI, TIM2_CH1, TIM8_CH1, I2C1_SCL, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_RX, UART4_RTS_DE, TIM1_BKIN, FDCAN3_TX, HRTIM1_FLT2, TIM2_ETR, EVENTOUT.
52 PC10 bidirectional GPIO (FT, 5 V tolerant). Alternate: TIM8_CH1N, UART4_TX, SPI3_SCK/I2S3_CK, USART3_TX, HRTIM1_FLT6, EVENTOUT.
53 PC11 bidirectional GPIO (FT_f, 5 V tolerant, Fm+). Alternate: HRTIM1_EEV2, TIM8_CH2N, UART4_RX, SPI3_MISO, USART3_RX, I2C3_SDA, EVENTOUT.
54 PC12 bidirectional GPIO (FT, 5 V tolerant). Alternate: TIM5_CH2, HRTIM1_EEV1, TIM8_CH3N, UART5_TX, SPI3_MOSI/I2S3_SD, USART3_CK, UCPD1_FRSTX, EVENTOUT.
55 PD2 bidirectional GPIO (FT, 5 V tolerant). Alternate: TIM3_ETR, TIM8_BKIN, UART5_RX, EVENTOUT.
56 PB3 bidirectional JTDO / TRACESWO in reset state (FT, 5 V tolerant). Alternate: JTDO-TRACESWO, TIM2_CH2, TIM4_ETR, UCPD1_CRS_SYNC, TIM8_CH1N, SPI1_SCK, SPI3_SCK/I2S3_CK, USART2_TX, TIM3_ETR, FDCAN3_RX, HRTIM1_SCOUT, HRTIM1_EEV9, SAI1_SCK_B, EVENTOUT.
57 PB4 bidirectional JTRST in reset state (FT_c, 5 V tolerant, USB Type-C PD capable). Additional: UCPD1_CC2. Alternate: JTRST, TIM16_CH1, TIM3_CH1, TIM8_CH2N, SPI1_MISO, SPI3_MISO, USART2_RX, UART5_RTS_DE, TIM17_BKIN, FDCAN3_TX, HRTIM1_EEV7, SAI1_MCLK_B, EVENTOUT.
58 PB5 bidirectional GPIO (FT_f, 5 V tolerant, Fm+). Alternate: TIM16_BKIN, TIM3_CH2, TIM8_CH3N, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, USART2_CK, I2C3_SDA, FDCAN2_RX, TIM17_CH1, LPTIM1_IN1, SAI1_SD_B, HRTIM1_EEV6, UART5_CTS, EVENTOUT.
59 PB6 bidirectional GPIO (FT_c, 5 V tolerant, USB Type-C PD capable). Additional: UCPD1_CC1. Alternate: TIM16_CH1N, TIM4_CH1, TIM8_CH1, TIM8_ETR, USART1_TX, COMP4_OUT, FDCAN2_TX, TIM8_BKIN2, LPTIM1_ETR, HRTIM1_SCIN, HRTIM1_EEV4, SAI1_FS_B, EVENTOUT.
60 PB7 bidirectional GPIO (FT_f, 5 V tolerant, Fm+). Additional: PVD_IN. Alternate: TIM17_CH1N, TIM4_CH2, I2C4_SDA, I2C1_SDA, TIM8_BKIN, USART1_RX, COMP3_OUT, TIM3_CH4, LPTIM1_IN2, FMC_NL, HRTIM1_EEV3, UART4_CTS, EVENTOUT.
61 PB8-BOOT0 bidirectional Multiplexed BOOT0 pin and GPIO PB8 (FT_f, 5 V tolerant, Fm+). At reset the pin selects the boot memory (main Flash / system memory / SRAM) depending on BOOT_SEL and nBOOT1 option bytes; afterwards operates as GPIO PB8. Alternate: TIM16_CH1, TIM4_CH3, SAI1_CK1, I2C1_SCL, USART3_RX, COMP1_OUT, FDCAN1_RX, TIM8_CH2, TIM1_BKIN, HRTIM1_EEV8, SAI1_MCLK_A, EVENTOUT.
62 PB9 bidirectional GPIO (FT_f, 5 V tolerant, Fm+). Alternate: TIM17_CH1, TIM4_CH4, SAI1_D2, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT, FDCAN1_TX, TIM8_CH3, TIM1_CH3N, HRTIM1_EEV5, SAI1_FS_A, EVENTOUT.
63 VSS power_in Digital ground reference (0 V).
64 VDD power_in Digital supply, 1.71-3.6 V. Local 100 nF decoupling required.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category MCU
Pins 64

Ordering variants

Same part, different packaging or reel option.

  • STM32G474RET6CxU
  • STM32G474RET6CxT
  • STM32G474RET6RBT6
  • STM32G474RET6RCT6
  • STM32G474RET6
  • STM32G474RET6MBT6
  • STM32G474RET6MCT6
  • STM32G474RET6MET6
  • STM32G474RET6VBT6
  • STM32G474RET6VCT6
  • STM32G474RET6VET6
  • STM32G474RET6QBT6
  • STM32G474RET6QCT6
  • STM32G474RET6QET6
  • STM32G474RET6AxY
  • STM32G474RET6VxH
  • STM32G474RET6QxJ

CAD (KiCad official)

  • Symbol: STM32G474RET6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32g474ret6-etched.step / stm32g474ret6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32g474ret6.step / stm32g474ret6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (236 pp, sha256 d493fe0ab22e61ff, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF