STM32G071KBT3

{
  "slug": "stm32g071kbt3",
  "version": "0.1.0",
  "type": "component",
  "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "stm32g071kbt3",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "stm32g071kbt3.kicad_sym",
    "stm32g071kbt3.kicad_mod",
    "stm32g071kbt3.glb",
    "stm32g071kbt3.step",
    "stm32g071kbt3.lbr",
    "docs/hero.png",
    "docs/stm32g071kbt3-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "stm32g071kbt3-hero.glb",
    "stm32g071kbt3-hero.overlay.json"
  ],
  "component": {
    "mpn": "STM32G071KBT3",
    "manufacturer": "STMicroelectronics",
    "package": "LQFP-32(7x7)",
    "pin_count": 32,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907783018188800",
    "parts": {
      "symbol": "stm32g071kbt3.kicad_sym",
      "footprint": "stm32g071kbt3.kicad_mod",
      "model_3d": "stm32g071kbt3-hero.glb",
      "model_3d_plain": "stm32g071kbt3.glb",
      "model_3d_step": "stm32g071kbt3-etched.step",
      "model_3d_step_plain": "stm32g071kbt3.step",
      "lbr": "stm32g071kbt3.lbr"
    },
    "distributor_links": {
      "lcsc": "C724238",
      "digikey": "497-STM32G071KBT3-ND",
      "mouser": "511-STM32G071KBT3"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T01:50:13Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "497-STM32G071KBT3-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "511-STM32G071KBT3",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PB9",
        "type": "bidirectional",
        "description": "5 V-tolerant Fm+-capable I/O (FT_f) with alternate functions including I2C1_SDA, USART3_RX, TIM17_CH1, SPI2_NSS and IR_OUT."
      },
      {
        "number": "2",
        "name": "PC14-OSC32_IN",
        "type": "bidirectional",
        "description": "5 V-tolerant GPIO supplied through the RTC-domain power switch, which sinks at most 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not be used as a current source; it is also the 32.768 kHz oscillator input OSC32_IN."
      },
      {
        "number": "3",
        "name": "PC15-OSC32_OUT",
        "type": "bidirectional",
        "description": "5 V-tolerant GPIO on the same RTC-domain power switch with the same 3 mA sink and 2 MHz / 30 pF output-speed limits as PC14; it is also the 32.768 kHz oscillator output OSC32_OUT."
      },
      {
        "number": "4",
        "name": "VDD/VDDA",
        "type": "power_in",
        "description": "Main supply for the I/Os, internal regulator and analog blocks, specified from 1.7 V to 3.6 V for VDD, with VDDA from 1.62 V for ADC and COMP (1.8 V for DAC, 2.4 V for VREFBUF) up to 3.6 V."
      },
      {
        "number": "5",
        "name": "VSS/VSSA",
        "type": "power_in",
        "description": "Ground reference for the digital and analog supplies; all voltages in the datasheet are referenced to VSS."
      },
      {
        "number": "6",
        "name": "PF2-NRST",
        "type": "bidirectional",
        "description": "Bidirectional reset pin with an embedded weak pull-up resistor (NRST), also usable as a 5 V-tolerant GPIO (PF2) with MCO alternate function."
      },
      {
        "number": "7",
        "name": "PA0",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing ADC_IN0, COMP1_INM and TAMP_IN2/WKUP1 analog or wakeup functions alongside SPI2_SCK, USART2_CTS and TIM2_CH1_ETR."
      },
      {
        "number": "8",
        "name": "PA1",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing ADC_IN1 and COMP1_INP alongside SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK and TIM2_CH2."
      },
      {
        "number": "9",
        "name": "PA2",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing ADC_IN2, COMP2_INM and WKUP4 alongside SPI1_MOSI/I2S1_SD, USART2_TX and LPUART1_TX."
      },
      {
        "number": "10",
        "name": "PA3",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing ADC_IN3 and COMP2_INP alongside SPI2_MISO, USART2_RX and LPUART1_RX."
      },
      {
        "number": "11",
        "name": "PA4",
        "type": "bidirectional",
        "description": "3.6 V-tolerant I/O (TT_a, input may go up to VDD+0.3 V), providing ADC_IN4, DAC_OUT1 and RTC_OUT2 alongside SPI1_NSS/I2S1_WS, SPI2_MOSI and TIM14_CH1."
      },
      {
        "number": "12",
        "name": "PA5",
        "type": "bidirectional",
        "description": "3.6 V-tolerant I/O (TT_a, input may go up to VDD+0.3 V), providing ADC_IN5 and DAC_OUT2 alongside SPI1_SCK/I2S1_CK, CEC and USART3_TX."
      },
      {
        "number": "13",
        "name": "PA6",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing ADC_IN6 alongside SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN and LPUART1_CTS."
      },
      {
        "number": "14",
        "name": "PA7",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing ADC_IN7 alongside SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N and COMP2_OUT."
      },
      {
        "number": "15",
        "name": "PB0",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing ADC_IN8 alongside SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, USART3_RX and UCPD1_FRSTX."
      },
      {
        "number": "16",
        "name": "PB1",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing COMP1_INM and ADC_IN9 alongside TIM14_CH1, TIM3_CH4, TIM1_CH3N and LPUART1_RTS_DE."
      },
      {
        "number": "17",
        "name": "PB2",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing COMP1_INP and ADC_IN10 alongside SPI2_MISO, USART3_TX and LPTIM1_OUT; this pin exists only in the GP version."
      },
      {
        "number": "18",
        "name": "PA8",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O (FT_c, VIN up to 5.0 V) with alternate functions MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT and UCPD1_CC1; a pull-down may be present at reset and can be disabled by strobing UCPDx_STROBE in SYSCFG_CFGR1 during start-up."
      },
      {
        "number": "19",
        "name": "PA9",
        "type": "bidirectional",
        "description": "5 V-tolerant Fm+-capable I/O with USB Type-C dead-battery function (FT_fd); alternate functions include MCO, USART1_TX, TIM1_CH2 and I2C1_SCL, and a pull-down may be present at reset that can be disabled through SYSCFG_CFGR1 UCPDx_STROBE."
      },
      {
        "number": "20",
        "name": "PC6",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O (FT) with alternate functions UCPD1_FRSTX, TIM3_CH1 and TIM2_CH3."
      },
      {
        "number": "21",
        "name": "PA10",
        "type": "bidirectional",
        "description": "5 V-tolerant Fm+-capable I/O with USB Type-C dead-battery function (FT_fd); alternate functions include SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN and I2C1_SDA, and a pull-down may be present at reset that can be disabled through SYSCFG_CFGR1 UCPDx_STROBE."
      },
      {
        "number": "22",
        "name": "PA11 [PA9]",
        "type": "bidirectional",
        "description": "5 V-tolerant Fm+-capable I/O (FT_f) whose default mapping is PA11, with alternate functions SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL and COMP1_OUT; PA9 can be remapped to this pin via SYSCFG_CFGR1."
      },
      {
        "number": "23",
        "name": "PA12 [PA10]",
        "type": "bidirectional",
        "description": "5 V-tolerant Fm+-capable I/O (FT_f) whose default mapping is PA12, with alternate functions SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA and COMP2_OUT; PA10 can be remapped to this pin via SYSCFG_CFGR1."
      },
      {
        "number": "24",
        "name": "PA13",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O (FT) that after reset is the SWDIO debug function with internal pull-up activated, also providing IR_OUT and EVENTOUT."
      },
      {
        "number": "25",
        "name": "PA14-BOOT0",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O (FT) that after reset is the SWCLK debug function with internal pull-down activated, and serves as the BOOT0 boot-mode pin when the boot selector option bit enables it."
      },
      {
        "number": "26",
        "name": "PA15",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O (FT) with alternate functions SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, USART4_RTS_DE_CK and USART3_RTS_DE_CK; this pin is present only in the GP version."
      },
      {
        "number": "27",
        "name": "PB3",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing COMP2_INM alongside SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2 and USART1_RTS_DE_CK."
      },
      {
        "number": "28",
        "name": "PB4",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O with analog switch function (FT_a), providing COMP2_INP alongside SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS and TIM17_BKIN."
      },
      {
        "number": "29",
        "name": "PB5",
        "type": "bidirectional",
        "description": "5 V-tolerant I/O (FT) with wakeup function WKUP6, alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, LPTIM1_IN1, I2C1_SMBA and COMP2_OUT."
      },
      {
        "number": "30",
        "name": "PB6",
        "type": "bidirectional",
        "description": "5 V-tolerant Fm+-capable I/O with analog switch function (FT_fa), providing COMP2_INP alongside USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR and I2C1_SCL."
      },
      {
        "number": "31",
        "name": "PB7",
        "type": "bidirectional",
        "description": "5 V-tolerant Fm+-capable I/O with analog switch function (FT_fa), providing COMP2_INM and PVD_IN alongside USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2 and I2C1_SDA."
      },
      {
        "number": "32",
        "name": "PB8",
        "type": "bidirectional",
        "description": "5 V-tolerant Fm+-capable I/O (FT_f) with alternate functions CEC, SPI2_SCK, TIM16_CH1, USART3_TX, TIM15_BKIN and I2C1_SCL."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package variant: the MPN STM32G071KBT3 has no 'N' suffix, so per the ordering-information scheme (x ; Pin-number mapping was derived from the Table 12 LQFP32/UFQFPN32 GP column because the text extracti; VBAT is not a pin on the LQFP32 package; the datasheet states the VBAT bonding pad is internally bon"
        ],
        "pages_sent": 64,
        "cost_usd": 0.2921,
        "at": "2026-10-11T01:49:56"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907783018188800",
        "pages": 133,
        "sha256": "96d7e9ca1500e794",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 32,
        "described": 32,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "stm32g071kbt3.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "stm32g071kbt3-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "bb0d27a93436af3ef39666d06b22eb255a4b553b60156510aa793e18c811a3f5",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}