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STM32G050C8T6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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STM32G050C8T6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32G050C8T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC13 | bidirectional | I/O pin, 5V tolerant, supports timer break-in, RTC timestamp, RTC output 1, tamper input 1, and wakeup 2 functions |
| 2 | PC14-OSC32_IN | bidirectional | I/O pin, 5V tolerant, used for 32 kHz oscillator input and timer break-in 2 function |
| 3 | PC15-OSC32_OUT | bidirectional | I/O pin, 5V tolerant, used for 32 kHz oscillator output and provides oscillator enable and timer break-in functions |
| 4 | VBAT | power_in | Backup battery supply voltage pin for RTC and backup registers, voltage range 2.0-3.6V |
| 5 | VREF+ | power_in | ADC reference voltage supply pin, connects to VDDA or external 2.0-3.6V reference |
| 6 | VDD/VDDA | power_in | Main power supply pin for analog and digital circuits, voltage range 2.0-3.6V |
| 7 | VSS/VSSA | power_in | Ground pin for analog and digital circuits |
| 8 | PF0-OSC_IN | bidirectional | I/O pin, 5V tolerant, used for oscillator input or provides timer 14 channel 1 capture |
| 9 | PF1-OSC_OUT | bidirectional | I/O pin, 5V tolerant, used for oscillator output and provides oscillator enable and timer 15 channel 1N functions |
| 10 | PF2-NRST | bidirectional | Reset pin with embedded weak pull-up resistor, used for device reset (NRST) or master clock output (MCO) |
| 11 | PA0 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI2 clock, USART2 clear-to-send, ADC input 0, tamper input 2, and wakeup 1 functions |
| 12 | PA1 | bidirectional | I/O pin, 5V tolerant with switchable diode to VDD, supports SPI1/I2S1 clock, USART2 request-to-send, I2C1 SMBus alert, timer 15 channel 1N, and ADC input 1 |
| 13 | PA2 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI1/I2S1 data, USART2 transmit, timer 15 channel 1N, low-speed clock output, wakeup 4, and ADC input 2 |
| 14 | PA3 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI2 data input, USART2 receive, timer 15 channel 2, and ADC input 3 |
| 15 | PA4 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI1/I2S1 chip select, SPI2 data output, timer 14 channel 1, RTC output 2, and ADC input 4 |
| 16 | PA5 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI1/I2S1 clock and ADC input 5 |
| 17 | PA6 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI1/I2S1 data input, timer 3 channel 1, timer 1 break-in, timer 16 channel 1, and ADC input 6 |
| 18 | PA7 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI1/I2S1 data output, timer 3 channel 2, timer 1 channel 1N, timer 14 channel 1, timer 17 channel 1, and ADC input 7 |
| 19 | PB0 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI1/I2S1 chip select, timer 3 channel 3, timer 1 channel 2N, and ADC input 8 |
| 20 | PB1 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports timer 14 channel 1, timer 3 channel 4, timer 1 channel 3N, and ADC input 9 |
| 21 | PB2 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI2 data input and ADC input 10 |
| 22 | PB10 | bidirectional | I/O pin, 5V tolerant with Fm+ I2C capability, supports SPI2 clock, I2C2 clock, and ADC input 11 |
| 23 | PB11 | bidirectional | I/O pin, 5V tolerant with Fm+ I2C capability, supports SPI2 data output, I2C2 data, and ADC input 15 |
| 24 | PB12 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI2 chip select, timer 15 break-in, timer 1 break-in, and ADC input 16 |
| 25 | PB13 | bidirectional | I/O pin, 5V tolerant with Fm+ I2C capability, supports SPI2 clock, timer 1 channel 1N, I2C2 clock, and timer 15 channel 1L |
| 26 | PB14 | bidirectional | I/O pin, 5V tolerant with Fm+ I2C capability, supports SPI2 data input, timer 1 channel 2N, timer 15 channel 1, and I2C2 data |
| 27 | PB15 | bidirectional | I/O pin, 5V tolerant, supports SPI2 data output, timer 1 channel 3N, timer 15 channel 1N, and RTC reference input |
| 28 | PA8 | bidirectional | I/O pin, 5V tolerant, supports master clock output, SPI2 chip select, and timer 1 channel 1 |
| 29 | PA9 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports master clock output, USART1 transmit, timer 15 break-in, timer 1 channel 2, SPI2 data input, and I2C1 clock |
| 30 | PC6 | bidirectional | I/O pin, 5V tolerant, supports timer 3 channel 1 |
| 31 | PC7 | bidirectional | I/O pin, 5V tolerant, supports timer 3 channel 2 |
| 32 | PA10 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports SPI2 data output, USART1 receive, timer 1 channel 3, timer 17 break-in, and I2C1 data |
| 33 | PA11 | bidirectional | I/O pin, 5V tolerant with analog switch and Fm+ capability, supports SPI1/I2S1 data input, USART1 clear-to-send, timer 1 channel 4, timer 1 break-in 2, I2C2 clock, and ADC input 15 |
| 34 | PA12 | bidirectional | I/O pin, 5V tolerant with analog switch and Fm+ capability, supports SPI1/I2S1 data output, USART1 request-to-send, timer 1 external trigger, I2S clock input, I2C2 data, and ADC input 16 |
| 35 | PA13 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports serial wire debug input, infrared output, and ADC input 17 |
| 36 | PA14-BOOT0 | bidirectional | I/O pin, 5V tolerant with analog switch, supports serial wire debug clock, USART2 transmit, boot mode select, and ADC input 18 |
| 37 | PA15 | bidirectional | I/O pin, 5V tolerant, supports SPI1/I2S1 chip select and USART2 receive |
| 38 | PD0 | bidirectional | I/O pin, 5V tolerant, supports SPI2 chip select and timer 16 channel 1 |
| 39 | PD1 | bidirectional | I/O pin, 5V tolerant, supports SPI2 clock and timer 17 channel 1 |
| 40 | PD2 | bidirectional | I/O pin, 5V tolerant, supports timer 3 external trigger and timer 1 channel 1N |
| 41 | PD3 | bidirectional | I/O pin, 5V tolerant, supports USART2 clear-to-send, SPI2 data input, and timer 1 channel 2N |
| 42 | PB3 | bidirectional | I/O pin, 5V tolerant, supports SPI1/I2S1 clock, timer 1 channel 2, and USART1 request-to-send |
| 43 | PB4 | bidirectional | I/O pin, 5V tolerant, supports SPI1/I2S1 data input, timer 3 channel 1, timer 17 break-in, and USART1 clear-to-send |
| 44 | PB5 | bidirectional | I/O pin, 5V tolerant, supports SPI1/I2S1 data output, timer 3 channel 2, timer 16 break-in, I2C1 SMBus alert, and wakeup 6 |
| 45 | PB6 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports USART1 transmit, timer 1 channel 3, timer 16 channel 1N, SPI2 data input, and I2C1 clock |
| 46 | PB7 | bidirectional | I/O pin, 5V tolerant with analog switch and Fm+ capability, supports USART1 receive, SPI2 data output, timer 17 channel 1N, I2C1 data, power supply monitor input, and ADC input 11 |
| 47 | PB8 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports SPI2 clock, timer 16 channel 1, timer 15 break-in, and I2C1 clock |
| 48 | PB9 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports infrared output, timer 17 channel 1, SPI2 chip select, and I2C1 data |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32G050C8T6 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32g050c8t6-etched.step/stm32g050c8t6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32g050c8t6.step/stm32g050c8t6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (92 pp, sha256
d88a92aba0852d4a, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM32G050C8T6
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32G050C8T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC13 | bidirectional | I/O pin, 5V tolerant, supports timer break-in, RTC timestamp, RTC output 1, tamper input 1, and wakeup 2 functions |
| 2 | PC14-OSC32_IN | bidirectional | I/O pin, 5V tolerant, used for 32 kHz oscillator input and timer break-in 2 function |
| 3 | PC15-OSC32_OUT | bidirectional | I/O pin, 5V tolerant, used for 32 kHz oscillator output and provides oscillator enable and timer break-in functions |
| 4 | VBAT | power_in | Backup battery supply voltage pin for RTC and backup registers, voltage range 2.0-3.6V |
| 5 | VREF+ | power_in | ADC reference voltage supply pin, connects to VDDA or external 2.0-3.6V reference |
| 6 | VDD/VDDA | power_in | Main power supply pin for analog and digital circuits, voltage range 2.0-3.6V |
| 7 | VSS/VSSA | power_in | Ground pin for analog and digital circuits |
| 8 | PF0-OSC_IN | bidirectional | I/O pin, 5V tolerant, used for oscillator input or provides timer 14 channel 1 capture |
| 9 | PF1-OSC_OUT | bidirectional | I/O pin, 5V tolerant, used for oscillator output and provides oscillator enable and timer 15 channel 1N functions |
| 10 | PF2-NRST | bidirectional | Reset pin with embedded weak pull-up resistor, used for device reset (NRST) or master clock output (MCO) |
| 11 | PA0 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI2 clock, USART2 clear-to-send, ADC input 0, tamper input 2, and wakeup 1 functions |
| 12 | PA1 | bidirectional | I/O pin, 5V tolerant with switchable diode to VDD, supports SPI1/I2S1 clock, USART2 request-to-send, I2C1 SMBus alert, timer 15 channel 1N, and ADC input 1 |
| 13 | PA2 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI1/I2S1 data, USART2 transmit, timer 15 channel 1N, low-speed clock output, wakeup 4, and ADC input 2 |
| 14 | PA3 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI2 data input, USART2 receive, timer 15 channel 2, and ADC input 3 |
| 15 | PA4 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI1/I2S1 chip select, SPI2 data output, timer 14 channel 1, RTC output 2, and ADC input 4 |
| 16 | PA5 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI1/I2S1 clock and ADC input 5 |
| 17 | PA6 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI1/I2S1 data input, timer 3 channel 1, timer 1 break-in, timer 16 channel 1, and ADC input 6 |
| 18 | PA7 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI1/I2S1 data output, timer 3 channel 2, timer 1 channel 1N, timer 14 channel 1, timer 17 channel 1, and ADC input 7 |
| 19 | PB0 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI1/I2S1 chip select, timer 3 channel 3, timer 1 channel 2N, and ADC input 8 |
| 20 | PB1 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports timer 14 channel 1, timer 3 channel 4, timer 1 channel 3N, and ADC input 9 |
| 21 | PB2 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports SPI2 data input and ADC input 10 |
| 22 | PB10 | bidirectional | I/O pin, 5V tolerant with Fm+ I2C capability, supports SPI2 clock, I2C2 clock, and ADC input 11 |
| 23 | PB11 | bidirectional | I/O pin, 5V tolerant with Fm+ I2C capability, supports SPI2 data output, I2C2 data, and ADC input 15 |
| 24 | PB12 | bidirectional | I/O pin, 5V tolerant with analog switch, supports SPI2 chip select, timer 15 break-in, timer 1 break-in, and ADC input 16 |
| 25 | PB13 | bidirectional | I/O pin, 5V tolerant with Fm+ I2C capability, supports SPI2 clock, timer 1 channel 1N, I2C2 clock, and timer 15 channel 1L |
| 26 | PB14 | bidirectional | I/O pin, 5V tolerant with Fm+ I2C capability, supports SPI2 data input, timer 1 channel 2N, timer 15 channel 1, and I2C2 data |
| 27 | PB15 | bidirectional | I/O pin, 5V tolerant, supports SPI2 data output, timer 1 channel 3N, timer 15 channel 1N, and RTC reference input |
| 28 | PA8 | bidirectional | I/O pin, 5V tolerant, supports master clock output, SPI2 chip select, and timer 1 channel 1 |
| 29 | PA9 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports master clock output, USART1 transmit, timer 15 break-in, timer 1 channel 2, SPI2 data input, and I2C1 clock |
| 30 | PC6 | bidirectional | I/O pin, 5V tolerant, supports timer 3 channel 1 |
| 31 | PC7 | bidirectional | I/O pin, 5V tolerant, supports timer 3 channel 2 |
| 32 | PA10 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports SPI2 data output, USART1 receive, timer 1 channel 3, timer 17 break-in, and I2C1 data |
| 33 | PA11 | bidirectional | I/O pin, 5V tolerant with analog switch and Fm+ capability, supports SPI1/I2S1 data input, USART1 clear-to-send, timer 1 channel 4, timer 1 break-in 2, I2C2 clock, and ADC input 15 |
| 34 | PA12 | bidirectional | I/O pin, 5V tolerant with analog switch and Fm+ capability, supports SPI1/I2S1 data output, USART1 request-to-send, timer 1 external trigger, I2S clock input, I2C2 data, and ADC input 16 |
| 35 | PA13 | bidirectional | I/O pin, 5V tolerant with switchable diode, supports serial wire debug input, infrared output, and ADC input 17 |
| 36 | PA14-BOOT0 | bidirectional | I/O pin, 5V tolerant with analog switch, supports serial wire debug clock, USART2 transmit, boot mode select, and ADC input 18 |
| 37 | PA15 | bidirectional | I/O pin, 5V tolerant, supports SPI1/I2S1 chip select and USART2 receive |
| 38 | PD0 | bidirectional | I/O pin, 5V tolerant, supports SPI2 chip select and timer 16 channel 1 |
| 39 | PD1 | bidirectional | I/O pin, 5V tolerant, supports SPI2 clock and timer 17 channel 1 |
| 40 | PD2 | bidirectional | I/O pin, 5V tolerant, supports timer 3 external trigger and timer 1 channel 1N |
| 41 | PD3 | bidirectional | I/O pin, 5V tolerant, supports USART2 clear-to-send, SPI2 data input, and timer 1 channel 2N |
| 42 | PB3 | bidirectional | I/O pin, 5V tolerant, supports SPI1/I2S1 clock, timer 1 channel 2, and USART1 request-to-send |
| 43 | PB4 | bidirectional | I/O pin, 5V tolerant, supports SPI1/I2S1 data input, timer 3 channel 1, timer 17 break-in, and USART1 clear-to-send |
| 44 | PB5 | bidirectional | I/O pin, 5V tolerant, supports SPI1/I2S1 data output, timer 3 channel 2, timer 16 break-in, I2C1 SMBus alert, and wakeup 6 |
| 45 | PB6 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports USART1 transmit, timer 1 channel 3, timer 16 channel 1N, SPI2 data input, and I2C1 clock |
| 46 | PB7 | bidirectional | I/O pin, 5V tolerant with analog switch and Fm+ capability, supports USART1 receive, SPI2 data output, timer 17 channel 1N, I2C1 data, power supply monitor input, and ADC input 11 |
| 47 | PB8 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports SPI2 clock, timer 16 channel 1, timer 15 break-in, and I2C1 clock |
| 48 | PB9 | bidirectional | I/O pin, 5V tolerant with Fm+ capability, supports infrared output, timer 17 channel 1, SPI2 chip select, and I2C1 data |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
## CAD (KiCad official)
- Symbol: `STM32G050C8T6`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `stm32g050c8t6-etched.step` / `stm32g050c8t6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32g050c8t6.step` / `stm32g050c8t6.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590454556657422336) (92 pp, sha256 `d88a92aba0852d4a`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm32g050c8t6-datasheet.pdf)