# STM32G031F4P6

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

STM32G031F4P6 from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB7/PB8 | bidirectional | Bonded PB7 (FT_fa; USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA, ADC_IN11, PVD_IN) and PB8 (FT_f; SPI2_SCK, TIM16_CH1, I2C1_SCL) I/O. |
| 2 | PB9/PC14-OSC32_IN | bidirectional | Bonded PB9 (FT_f; IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA) and PC14 (FT; OSC32_IN/OSC_IN, TIM1_BK2) I/O; PC14 output limited to 2 MHz, 30 pF max load, not a current source. |
| 3 | PC15-OSC32_OUT | bidirectional | FT I/O PC15 with OSC32_OUT additional function and OSC32_EN/OSC_EN alternate functions; supplied through power switch (3 mA sink limit), output limited to 2 MHz with 30 pF max load. |
| 4 | VDD/VDDA | power_in | Supply pin for the digital, I/O and analog domains (VDD = VDDA = VDDIO1), 1.7 V to 3.6 V, to be decoupled with ceramic capacitors close to the pin. |
| 5 | VSS/VSSA | power_in | Ground reference for digital and analog supply, to be decoupled with VDD/VDDA. |
| 6 | PF2-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up (function upon reset NRST), also PF2 with MCO alternate function. |
| 7 | PA0 | bidirectional | FT_a I/O with SPI2_SCK, USART2_CTS, TIM2_CH1_ETR, LPTIM1_OUT alternate functions and ADC_IN0, TAMP_IN2, WKUP1 additional functions. |
| 8 | PA1 | bidirectional | FT_ea I/O with SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2, I2C1_SMBA, EVENTOUT alternate functions and ADC_IN1. |
| 9 | PA2 | bidirectional | FT_a I/O with SPI1_MOSI/I2S1_SD, USART2_TX, TIM2_CH3, LPUART1_TX alternate functions and ADC_IN2, WKUP4, LSCO. |
| 10 | PA3 | bidirectional | FT_ea I/O with SPI2_MISO, USART2_RX, TIM2_CH4, LPUART1_RX, EVENTOUT alternate functions and ADC_IN3. |
| 11 | PA4 | bidirectional | FT_a I/O with SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, LPTIM2_OUT, EVENTOUT alternate functions and ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. |
| 12 | PA5 | bidirectional | FT_ea I/O with SPI1_SCK/I2S1_CK, TIM2_CH1_ETR, LPTIM2_ETR, EVENTOUT alternate functions and ADC_IN5. |
| 13 | PA6 | bidirectional | FT_ea I/O with SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BK, TIM16_CH1, LPUART1_CTS alternate functions and ADC_IN6. |
| 14 | PA7 | bidirectional | FT_a I/O with SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 alternate functions and ADC_IN7. |
| 15 | PB0/PB1/PB2/PA8 | bidirectional | Four bonded I/Os PB0, PB1, PB2 (FT_ea, ADC_IN8/9/10, TIM3/TIM1/LPTIM/SPI functions) and PA8 (FT; MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT, EVENTOUT). |
| 16 | PA11 [PA9] | bidirectional | FT_fa I/O with SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BK2, I2C2_SCL alternate functions and ADC_IN15; can be remapped to PA9 via SYSCFG_CFGR1. |
| 17 | PA12 [PA10] | bidirectional | FT_fa I/O with SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA alternate functions and ADC_IN16; can be remapped to PA10 via SYSCFG_CFGR1. |
| 18 | PA13 | bidirectional | FT_ea I/O, SWDIO upon reset with internal pull-up active, plus IR_OUT, EVENTOUT and ADC_IN17. |
| 19 | PA14-BOOT0/PA15 | bidirectional | Bonded PA14-BOOT0 (SWCLK upon reset with internal pull-down active, USART2_TX, ADC_IN18, BOOT0) and PA15 (FT; SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR) I/O. |
| 20 | PB3/PB4/PB5/PB6 | bidirectional | Four bonded FT I/Os: PB3, PB4, PB5 (WKUP6) and PB6 (FT_f) with SPI1, TIM, USART1, LPTIM1, I2C1 alternate functions. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |

## CAD (KiCad official)

- Symbol: `STM32G031F4P6`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `stm32g031f4p6-etched.step` / `stm32g031f4p6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32g031f4p6.step` / `stm32g031f4p6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908486025887744) (117 pp, sha256 `0fc5e46abdba3d02`, retrieved 2026-10-05, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32g031f4p6-datasheet.pdf)